Re: [Gems-users] cache statistics with timing info.


Date: Wed, 9 Mar 2005 11:58:39 -0500
From: yilmazer@xxxxxxxxxxx
Subject: Re: [Gems-users] cache statistics with timing info.
Thanks Luke,
May I ask a few more questions? 
Which parameters can be changed at run-time and which ones need to be known at
compile-time both opal and ruby? It looks like the parameters starting with g_
can be changed at run-time using setparam command. Is that true?

And which parameters take part in network latency calculation?

Thanks a lot again.
Ayse Yilmazer.

Quoting Luke Yen <lyen@xxxxxxxxxxx>:

> Hello Ayse:
> 
>    As you may know, Opal has to check its OoO execution with Simics'
> in-order execution at retirement.  Therefore this is the area to
> look for when locating wrong-path memory instructions.
>    In Opal, all speculatively executed instructions (including memory
> instructions) are checked in retireInstruction().  Inside this function it
> calls checkChangedState(), which enables checking all destination
> registers written to by each instruction as well as the misc control
> registers.  Therefore incorrect loads will be detected when the
> destination register's value  written by the load does not match the
> destination register value  for that load when Simics is stepped forward.
>    When this happens, fullSquash() is invoked to rollback the PC to the
> in-order retirement PC.
>   Keep in mind that Opal is very aggressive in its memory consistency
> model so you may find that loads and stores are executed out of program
> order.
> 
>    Luke
> 
> On Mon, 7 Mar 2005 yilmazer@xxxxxxxxxxx wrote:
> 
> > Thanks Nauman and Mike.
> >
> > I will try protocol debug tracer. Actually, I have a few more question. I
> want
> > to  trace speculative wrong-path loads in ruby.
> >
> > When it is known that the speculatively executed path is wrong and what
> happens,
> > how recovery is handled in opal, where I should look for?
> >
> > Thanks a lot for your help and time,
> >
> > Ayse Yilmazer.
> >
> > Quoting Mike Marty <mikem@xxxxxxxxxxx>:
> >
> > > Nauman and Ayse,
> > >
> > > Its great to see others contributing to this mailing list!  Your
> > > information was quite good.
> > >
> > > By default, the Ruby statistics will tell you how many transitions
> > > occured.  As Nauman pointed out, these transitions and states are
> > > specified in the SLICC files.
> > >
> > > In order to get the time of these transitions, you can use the protocol
> > > debug tracer.  This is mentioned briefly on our documentation site in
> the
> > > "Debugging Ruby README" file.  Have a look at this.
> > >
> > > In short, set the RUBY_DEBUG Makefile flag to true.  Ensure that the
> > > PROTOCOL_DEBUG_TRACE option is also set to true in the
> > > ruby/config/rubydefaults.config.
> > >
> > > This will enabled a trace of every transition that occurs.  To start the
> > > trace in Simics, enter this command:
> > >
> > >   ruby0.debug-start-time "1"'
> > >
> > > This will start the protocol trace at time 1 (the very first cycle).  It
> > > will give you every transition, for every block, and give you the time
> as
> > > well.
> > >
> > >
> > > I believe you can direct this output to a file as well with this
> command:
> > >
> > >   ruby0.debug-output-file /scratch/ruby_debug_output.txt
> > >
> > > --Mike
> > >
> > >
> > > > You have to look into SLICC specification of cache coherence
> protocols.
> > > The
> > > > SLICC specification is translated automatically to C++ code. So all
> the
> > > code for
> > > > caches is automatically generated.
> > > > To find the specification for different protocols, look into the
> protocols
> > > > directory in gems folder.
> > > >
> > > > Here is an example of profiling in SLICC
> > > >
> > >
> >
>
-------------------------------------------------------------------------------
> > > >   action(uu_profileMiss, "\u", desc="Profile the demand miss") {
> > > >     peek(L1requestNetwork_in, RequestMsg) {
> > > >       // AccessModeType not implemented
> > > >       profile_L2Cache_miss(convertToGenericType(in_msg.Type),
> > > in_msg.AccessMode,
> > > > MessageSizeTypeToInt(in_msg.MessageSize),  in_msg.Prefetch,
> > > > machineIDToNodeID(in_msg.Requestor));
> > > >     }
> > > >   }
> > > >
> > >
> >
>
-------------------------------------------------------------------------------
> > > >
> > > > The function profile_L2Cache_miss is declared in
> RubySlicc_Profiler.sm,
> > > > GEMS/ruby/slicc_interface/RubySlicc_Profiler_interface.h and
> > > > GEMS/ruby/slicc_interface/RubySlicc_Profiler_interface.C.
> > > > It is implemented in files in GEMS/ruby/profiler.
> > > > So make your own function on the same pattern.
> > > > p.s.
> > > > Just trying to point you in the right direction. I am a newbie too so
> dont
> > > trust
> > > > me too much :)
> > > >
> > > > Thanks.
> > > > --
> > > > Nauman
> > > >
> > > >
> > > > Quoting yilmazer@xxxxxxxxxxx:
> > > >
> > > > > Hi,
> > > > > I have just started to use gems. I want to collect some statistics
> from
> > > ruby
> > > > > cache module. What I want to do is to track transitions of shared
> > > > > cache-lines
> > > > > with timing information.
> > > > >    t1: Modified
> > > > >    ..
> > > > >    tn: Modified/Shared
> > > > >    tm: Invalid
> > > > >    what is t1 time, tn and tm?
> > > > > I looked over the source code but I couldn't figure out where to
> start.
> > > If
> > > > > you
> > > > > can help me, I will very appreciate it.
> > > > > Thanks,
> > > > > Ayse Yilmazer.
> > > > >
> > > > > _______________________________________________
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> > > > >
> > > >
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> >
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