[Gems-users] How many hops a cache-to-cache transfer requires in MSI-MESI-CMP_directory protocol?

[Liqun Cheng <liqun.cheng@xxxxxxxxx>]

Hi:

 

It seems a L1 cache-to-cache transfer (on the same chip) in MSI-MESI-CMP_directory needs 4 hops (L1a->L2->L1b->L2->L1a) instead of typcial 3 hops (L1a->L2->L1b->L1a). Do you guys assume there are no point-to-point connection between L1s on the same chip?

 

I want to simulate a CMP with 16 cores(procs+L1s) on the same chip. All cores share the same L2 cache and maintain coherence by using MESI directory protocol with 3 hop cache-to-cache transfer. What's the most similar protocol available?

 

Thanks a lot!

Legion