With cpu-switch-time = 100, Simics will simulate each cpu for 100
cycles, then switch to the next processor. As to what memory model and
how instructions appear to interleave, see the Simics documentation for
details, or the Simics forums (www.simics.net).
For all of our simulations with GEMS, we set the cpu-switch-time to 1
to avoid these timing concerns. This occurs in the "gen-scripts"
section, from mfacet.py if I remember correctly.
Regards,
Dan
arrvindh shriraman wrote:
Does cpu-switch-time influence timing aspects in ruby ?
In interface.C the rubyeventqueue is woken up for every cycle advanced
on processor 0, to process events and advance global time. and in
Sequencer.c->Message.C . The arrival time of a Load message is
specified to be global event queue's current time.
Consider the following code with cpu-switch-time of 100.
Simics Quantum 1
Processor 1:
Ld
...
...
Processor 2:
Ld
...
==================
Does this mean processor2's load will only be seen at time - 100 since
processor 1 has to complete . If there's another Ld from Processor 2
after this quantum has finished, what is the timestamp on that.
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