Re: [Gems-users] Generating a new line address in Ruby

["Tushar Krishna (tkrishna@xxxxxxxxxxxxx)" <tkrishna@xxxxxxxxxxxxx>]

Hi Mike,
I am issuing the Prefetch in the following way inside the b_issueGETX() function in L2Cache_Controller.C :

       Address prefetch_addr = addr;
  	 
       prefetch_addr.get_next_line_address(1);

//get_next_line_address() is a function I created in common/Address.h which is similar to makeNextStrideAddress() except that it doesnt mask the lower order bits. i.e. it just does m_address += RubyConfig::dataBlockBytes()*stride;
	 
	
	RequestMsg prefetch_msg = out_msg;
	(prefetch_msg).m_Address = prefetch_addr;
	(prefetch_msg).m_Prefetch = PrefetchBit_L2_HW;
	
	
	//ORIGINAL REQUEST:
      ((*(m_chip_ptr->m_L2Cache_DirRequestFromL2Cache_vec[m_version]))).enqueue(out_msg, L2_REQUEST_LATENCY);
      
      //PREFETCH REQUEST:
      ((*(m_chip_ptr->m_L2Cache_DirRequestFromL2Cache_vec[m_version]))).enqueue(prefetch_msg, L2_REQUEST_LATENCY);



And to make sure that the controller knows that the line being fetched is a prefetch line which does not need to be sent to L1, I have added a function to allocate the m_Prefetch field in the TBE as true so that h_issueLoadHit() etc dont send the response from L2 to L1)



I am guessing that the prefetch address I generate from  prefetch_addr.get_next_line_address(1); is creating the problem.

Tushar







How are you issuing the prefetch?  The assertion indicates that the DirectoryController got a message for an address that falls outside of its mapped range.

--Mike


On Dec 8, 2007 3:28 AM, Tushar Krishna ( tkrishna@xxxxxxxxxxxxx) <tkrishna@xxxxxxxxxxxxx> wrote:

    Hi,
    I am trying to implement data prefetch in ruby.
    I wish to prefetch the next line of memory on a miss from L2.

    I faced a problem in generating the new address to prefetch.

    >From the ruby code I saw that the Sequencer generates the line address from the request address and that is what is sent to L1 and L2 and the memory. So the addr that the L2Cache controller receives is the line address. Initially I tried using makeNextStrideAddress(1) for the prefetch line but got a runtime error in simics :

    failed assertion 'isPresent(address)' at fn Directory_Entry& DirectoryMemory::lookup(PhysAddress) in system/DirectoryMemory.C:132
    failed assertion 'isPresent(address)' at fn Directory_Entry& DirectoryMemory::lookup(PhysAddress) in system/DirectoryMemory.C:132
    At this point you might want to attach a debug to the running and get to the
    crash site; otherwise press enter to continue
    PID: 21441


    I realized that makeNextStrideAddress does a maskLowOrderBits which I do not need as I already have the line address. So I created a new function that would just add RubyConfig::dataBlockBytes()*stride to the current address.
    However, that also gave the same error.

    Could anyone tell me where I'm going wrong?

    Thanks
    Tushar