Re: [Gems-users] Questions about map_L1CacheMachId_to_L2Cache()

["Mike Marty" <mike.marty@xxxxxxxxx>]

On Dec 27, 2007 5:51 AM, 张量 <congwu.zhang@xxxxxxxxx> wrote:

  Hi all ,

  I'm using gems-2.0 and MESI_SCMP_bankdirector protocol. When a L1 cache has a miss, a request message to L2 is needed.  If the L2 is multi-banked,for example,

in my configuration 16 processors,16 chips with a 32-banked shared L2 cache, which L2 bank is the destination is determined by function

                      MachineID map_L1CacheMachId_to_L2Cache(const Address& addr, MachineID L1CacheMachId);

  Then I found a very confusing phenomenon : when L1CacheMachId is n, then L2Cache Id is always 2n or 2n+1, I feel I have to modify map_L1CacheMachId_to_L2Cache(),

am I right?

I'm not seeing that in the code.  First it selects an L2 bank # by interleaving on the address based on the number of banks per chip.  Then for a multiple-chip system, it needs to add the offset (based on which chip) to the L2 bank. 

--Mike