State transitions will happen immediately. Thus you can go from
L2_NP->L2_IM->?? all in the same cycle. The ordering of wakeups for
events in the same cycle is undefined.
--Mike
> Hongxia, thanks a lot for your reply! L2_MigrationDone is
> L2_SomeOtherEvent. If these two events happen in one cycle, the state
> transition will be a mess, right? My current understanding is that state
> transitions only take place in the next cycle after the event is posted,
> is that correct? So in the current cycle, state has not changed yet, and
> therefore some other event won't cause another state transition.
>
> Thank you,
> Lei
> ----- Original Message -----
> From: hongxia sun
> To: Lei Yang ; Gems Users
> Sent: Sunday, January 21, 2007 11:51 PM
> Subject: Re: [Gems-users] GEMS state transition problem
>
>
> "L2_MigrationDone" is "L2_SomeEvent" or "L2_SomOtherEvent"?
> When does the "L2_SomeEvent" and "L2_SomeOtherEvent" happen?
> Please pay attention that the transition "1635 1 0 L2Cache L2_SomeEvent L2_NP>L2_IM [0x400, line 0x400]" happened at time 1635.
> While the invalid transition also try to happen at time 1635 "Warning: in fn TransitionResult L2Cache_Controller::doTransitionWorker(L2Cache_Event, L2Cache_State, L2Cache_State&, const Ad
> dress&) in generated/MSI_MOSI_CMP_directory/L2Cache_Transitions.C:1652: g_eventQueue_ptr->getTime() is 1635".
> At cycle 1635, the cache line state keeps as L2_NP but not L2_IM, therefore, event "L2_MigrationDone" cause an invalid transition.
>
>
>
>
>
> ÔÚ07-1-22£¬Lei Yang <lya755@xxxxxxxxxxxxxxxxxxxx> дµÀ£º
> Dear list,
>
> I've been working on a new protocol and I was trying to add new transitions in the MSI_MOSI_CMP_directory protocol like this:
>
> transition({L2_I, L2_NP}, L2_SomeEvent, L2_IM) {
> someAction;
> }
>
> transition(L2_IM, L2_SomeOtherEvent, L2_M) {
> someOtherAction;
> }
>
> However, when testing with a simple trace, I found that although the state of a line appears to have changed from L2_NP to L2_IM, later on when L2_SomeOtherEvent occurs, it refuses to change its state to L2_M and complains about still being in state L2_NP and hence invalid transition, as follows:
>
> 1635 1 0 L2Cache L2_SomeEvent L2_NP>L2_IM [0x400, line 0x400]
> Warning: in fn TransitionResult L2Cache_Controller::doTransitionWorker(L2Cache_Event, L2Cache_State, L2Cache_State&, const Ad
> dress&) in generated/MSI_MOSI_CMP_directory/L2Cache_Transitions.C:1650: m_id is 1
> Warning: in fn TransitionResult L2Cache_Controller::doTransitionWorker(L2Cache_Event, L2Cache_State, L2Cache_State&, const Ad
> dress&) in generated/MSI_MOSI_CMP_directory/L2Cache_Transitions.C:1651: m_version is 0
> Warning: in fn TransitionResult L2Cache_Controller::doTransitionWorker(L2Cache_Event, L2Cache_State, L2Cache_State&, const Ad
> dress&) in generated/MSI_MOSI_CMP_directory/L2Cache_Transitions.C:1652: g_eventQueue_ptr->getTime() is 1635
> Warning: in fn TransitionResult L2Cache_Controller::doTransitionWorker(L2Cache_Event, L2Cache_State, L2Cache_State&, const Ad
> dress&) in generated/MSI_MOSI_CMP_directory/L2Cache_Transitions.C:1653: addr is [0x400, line 0x400]
> Warning: in fn TransitionResult L2Cache_Controller::doTransitionWorker(L2Cache_Event, L2Cache_State, L2Cache_State&, const Ad
> dress&) in generated/MSI_MOSI_CMP_directory/L2Cache_Transitions.C:1654: event is L2_MigrationDone
> Warning: in fn TransitionResult L2Cache_Controller::doTransitionWorker(L2Cache_Event, L2Cache_State, L2Cache_State&, const Ad
> dress&) in generated/MSI_MOSI_CMP_directory/L2Cache_Transitions.C:1655: state is L2_NP
> Fatal Error: in fn TransitionResult L2Cache_Controller::doTransitionWorker(L2Cache_Event, L2Cache_State, L2Cache_State&, cons
> t Address&) in generated/MSI_MOSI_CMP_directory/L2Cache_Transitions.C:1656: Invalid transition
>
> I wonder what else is needed to change the state of a line in addition to the transition() statement. Have anyone met with this problem before? Please advice!
>
> Thanks a lot!!
>
> Lei
>
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