Date: | Fri, 24 Oct 2008 10:40:30 +1300 |
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From: | "Fuad Tabba" <fuad@xxxxxxxxxxxxxxxxx> |
Subject: | Re: [Gems-users] Having more than one cache request go out simultaniously per processor |
Thanks Dan. But looking at the code for LogTM-SE, TransactionSimicsProcessor::generateLogRequest, which does send out a cache request to store the log entry, is issued at the same time (same cycle, in fact, same function call tree) as SimicsProcessor::makeRequest -> Sequencer::makeRequest -> Sequencer::doRequest, which issues a cache request for the inplace store. So, if my understand is correct, it does seem that LogTM-SE at certain times issue two store cache requests simulatiously, and the hitCallback functions have the mechanisms in place to detect two callbacks triggerred by the same store; TransactionSimicsProcessor::completedMemRef keeps track of m_outstandingXactStoreRefCount , which would be set to 2 in the case of two cache requests sent for a LogTM store. This seems to indicate that it might be possible in ruby, without running opal, to issue more than one cache request at a time. Am I missing something in the code? Or is this case an exception made just for LogTM-SE? If it is an exception for LogTM-SE, is there a reason why such an exception can't be made in other contexts? Thanks again Dan. Cheers, /fuad On Fri, Oct 24, 2008 at 9:57 AM, Dan Gibson <degibson@xxxxxxxx> wrote: This is not currently possible when executing only with Ruby, as Simics models 'in-order' cores. When running with Opal, you should occasionally observe multiple accesses per cycle from the same core. |
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