Date: | Tue, 8 Dec 2009 17:14:03 -0600 |
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From: | Dan Gibson <degibson@xxxxxxxx> |
Subject: | Re: [Gems-users] mandatory queue recycle() and program order |
1. Each processor may only have one access to each block outstanding. If a processor attempts to issue a second request, Ruby's isReady() function returns false. In your example below of LD-ST-LD, the ST's isReady() would return false, and the coherence hierarchy wouldn't see the ST until the first LD had been fully handled (and therefore, the L1 would be in S). 2. Processor models (i.e., Opal or Simics) are assumed to handle the memory consistency and ordering side of things. Regards, Dan On Tue, Dec 8, 2009 at 2:27 PM, Byn Choi <bynchoi1@xxxxxxxxxxxx> wrote: Hi, -- http://www.cs.wisc.edu/~gibson [esc]:wq! |
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