[Gems-users] Cache miss of supervisor mode

[안정섭 <jeong.seob.ahn@xxxxxxxxx>]

Hi all.

 

I have been running some bench marks like splash-2, specjbb, parsec, etc.

My problem is that cache misses of supervisor mode is higher than that of user mode.

 

How can i resolve it?

Cache misses(L1 and L2) of supervisor mode is over 90%.

Mmy configuration is followings:

-16 core

- 32kb L1 256kb L2(both are private)

- MOESI_SMP_directory

- simple network (PT to PT)

 

I attached one ruby dump file. u can see strange statistics at this file.

Is this proportion(user vs supervisor) right? it seems unreasonable.

As i know, some people have same problem but there is no answer.

 

And another question, I use MOESI_SMP_protocol in order to mimics CMP_directory with L2 private cache. But i wonder where the storage where directory structure(like sharer) is stored is. As i know in SMP, directory is stored in memory. if so, a L2 cache miss makes off-chip traffic. right?

 

But if in CMP, directory is stored in directory cache, L2 cache misses in CMP is on-chip traffic.

How is this difference removed?

 

I hope u can fully understand my question. I'm worry because of my poor english.

Thank u.