Re: [Gems-users] About cache protocols

[Polina Dudnik <pdudnik@xxxxxxxxx>]

Jianwei,

MESI simulates private l1 and shared banked l2. Isn't that exactly what you need? 

Polina

On Mon, Oct 12, 2009 at 9:13 PM, dai jianwei <adaihf@xxxxxxxxx> wrote:

Hi,all

  I want to study a CMP system, in which each core has its private L1 I/D cache and a L2 cache is a unified cache shared by all the cores. Inclusion is also applied on the L1 and L2 caches. The protocol I want to study is MESI based broadcast protocol. My question is that in order to do it, do I need to construct a totally new memory controller? I am wondering if there is some tricky way to do it. I mean if I can modify some existing memory controller to make it work in the way what I want it to work.  

  Any suggestion is highly appreciated. Thanks a lot

Jianwei

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