Re: [Gems-users] Flush back L2 Cache

[Bradford Beckmann <beckmann@xxxxxxxxxxx>]

Weihang,

That's a great question!  Definitely an issue real hardware needs to
handle.  The simple answer is Ruby assumes page faults don't happen
often, therefore, there is no logic to handle this.

If you're trying to implement this, one thing to remember is the caches
are controlled by the SLICC generated controllers.  Therefore, a straight
forward cache flushing functionality would need to be implemented in each
*cache*.sm file.  This of course would result in a lot of duplicate code.

Brad


On Thu, 10 Feb 2005, Weihang Jiang wrote:

> What I am asking is about memory replacement. When a physical memory
> page is replaced, the corresponding L2 cache lines need to be flushed
> first. I assume in SIMICS/GEMS, it has been handled(functionally, but
> without timing).
>
> However Simple Scalar does not model this, while Rambus memory module
> does this. Rambus memory code explicitly does the L2 cache flush for
> memory replacement. It is where bring me the confusion.
>
> If my understanding of SIMICS/GEMS is correct, please ignore my
> question for now. I need to read more to figure out how Rambus memory
> module works.
>
> Thank you for patient.
>
>
>
>
> On Thu, 10 Feb 2005 12:55:06 -0600, Min Xu (Hsu) <xu@xxxxxxxxxxx> wrote:
> > Weihang,
> >
> > Maybe you are talking about "write-back" a dirty cache line from L1
> > to L2. By my understanding to Ruby, Ruby doesn't keep track of data
> > by default. So there is no actual data write-back. If you are interested
> > in simulating the timing of the write-back, the best way would be
> > modifying the protocol specification, which is written in SLICC.
> >
> > Can you be more specific about the question?
> >
> > Thanks!
> >
> > -Min
> >
> > On Thu, 10 Feb 2005 Weihang Jiang wrote :
> > > Hi,
> > >    In RUBY, how can I flush back a certain L2 cache line, given its
> > > physical address?
> > > --
> > > Weihang Jiang
> > > _______________________________________________
> > > Gems-users mailing list
> > > Gems-users@xxxxxxxxxxx
> > > https://lists.cs.wisc.edu/mailman/listinfo/gems-users
> > _______________________________________________
> > Gems-users mailing list
> > Gems-users@xxxxxxxxxxx
> > https://lists.cs.wisc.edu/mailman/listinfo/gems-users
> >
>
>
> --
> Weihang Jiang
> _______________________________________________
> Gems-users mailing list
> Gems-users@xxxxxxxxxxx
> https://lists.cs.wisc.edu/mailman/listinfo/gems-users
>