Re: [Gems-users] Using GEMS with Stale Data Accesses

[Mike Marty <mikem@xxxxxxxxxxx>]

Sid,

I'm sorry but this must be a bug or something we've implemented before but
have not tested it in awhile.  Have a look at interface.C and
STD_Sequencer.C for the functions that are supposed to read/write data.
You should be able to re-implement what you want pretty easily.

--Mike



> Hi Mike, thanks for your reply regarding Stale Data Accesses. We've tried
> to enable the DATA_BLOCK configuration to 'true' in
> ruby/rubyconfig.defaults. However when running Simics we now get the
> following error.
>
> *************************************************************************
> failed assertion 'obj != __null' at fn void
> SIMICS_read_physical_memory_buffer(int, long long unsigned int, char*,
> int) in simics/interface            .C:256
> failed assertion 'obj != __null' at fn void
> SIMICS_read_physical_memory_buffer(int, long long unsigned int, char*,
> int) in simics/interface            .C:256
>
> At this point you might want to attach a debug to the running and get to the
> crash site; otherwise press enter to continue
> **************************************************************************
>
> Would you know if there is another parameter somewhere that we need to be
> setting in order to get Stale Data Access to work? Would really appreciate
> any help!.
>
> Thanks
> Sid
>
>
>
>
> > By default, when running Ruby with Simics, no data values are stored.  We
> > rely on Simics to provide the data value and Ruby models the timing only.
> >
> > However this can be changed through the DATA_BLOCK configuration option in
> > ruby/rubyconfig.defaults.  Note that this is set to true for the random
> > tester because the tester relies on this for detecting protocol errors.
> >
> > --Mike
> >
> >
> >> Hello,
> >>
> >> I'm working with Sid on trying to get the stale data accesses working
> >> under Gems.
> >>
> >> We can't seem to get the stale data out of the CPU's local L1 cache.
> >> We've tried at least 5 different ways but the cache-line always comes
> >> back
> >> all zeros.
> >>
> >> Currently in ./ruby/system/CacheMemory.h I made a copy
> >> of tryCacheAccess called tryCacheAccessStale.
> >> The only change I made was to have it return "true" if
> >> entry.m_Permission == AccessPermission_Invalid.
> >>
> >> It is called from ./ruby/system/STD_Sequencer.h as this
> >>
> >> bool hit = m_chip_ptr->m_L1Cache_L1DcacheMemory_vec[m_version]->
> >>         tryCacheAccessStale(
> >> Address(line_address(request.getAddress())),
> >>                               request.getType(),data_ptr);
> >>
> >>
> >> I would assume this would return in data_ptr the data from this cache
> >> block, but it doesn't.  All it returns are zeros.
> >>
> >> Am I doing something obviously wrong here?
> >>
> >>
> >> I've also tried using getMemoryValue() instead to get the cache block
> >> and that didn't work either.
> >>
> >>
> >> I appreciate any help anyone can give,
> >>
> >> Vince
> >>
> >> _______________________________________________
> >> Gems-users mailing list
> >> Gems-users@xxxxxxxxxxx
> >> https://lists.cs.wisc.edu/mailman/listinfo/gems-users
> >>
> > _______________________________________________
> > Gems-users mailing list
> > Gems-users@xxxxxxxxxxx
> > https://lists.cs.wisc.edu/mailman/listinfo/gems-users
> >
>
>
> _______________________________________________
> Gems-users mailing list
> Gems-users@xxxxxxxxxxx
> https://lists.cs.wisc.edu/mailman/listinfo/gems-users
>