Date: | Wed, 16 Nov 2005 08:35:15 -0600 (CST) |
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From: | Mike Marty <mikem@xxxxxxxxxxx> |
Subject: | Re: [Gems-users] Protocol with Directory Cache |
It depends on where the real directroy controller is in your system. You can easily take an existing directory controller and add a cache to it. You can change the getState() function in the Directory controller to return a different state if the directory entry is cached. Actions triggered by events to these cached states will use a lower latency. However this approach isn't "on chip" unless your directory/memory controller is on-chip as well. --Mike > > Hello > > I'm working on impact on performance of Directory Caches. I've seen that > directory implemented in MOSI_SMP_directory uses a directory entry by main mem > block.I need to simulate a Directory Cache near each chip to cache directory > entries. Is there any SLICC protocol that implements Directory Caches? > If there is nothing like that, How could I implemet it? > > Thanks > > > PS: Sorry for anterior no subject > > ------------------------------------------------- > This mail sent through IMP: http://horde.org/imp/ > > _______________________________________________ > Gems-users mailing list > Gems-users@xxxxxxxxxxx > https://lists.cs.wisc.edu/mailman/listinfo/gems-users > |
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