Re: [Gems-users] Protocol with Directory Cache

[Alaa Alameldeen <alaa@xxxxxxxxxxx>]

It looks like you need Chip.h to know about the dircache definition you 
created in SLICC. To do so, you need to add the m_Directory_dircache_vec 
definition to ruby/slicc_interface/AbstractChip.h, similar to the way 
vectors for the L1I, L1D and L2 caches were defined.
-Alaa

adgg1@xxxxxxxxx wrote:
> The main problem I have is that:
>
> I modified MOESI_SMP_directory.sm and I added:
>
> external_type(CacheMemory) {....}
>
> CacheMemory dircache,.....
>
> When compiling I get:
>
> generated/MOESI_SMP_dircache/Chip.C: In constructor 'Chip::Chip(NodeID, Network*)':
> generated/MOESI_SMP_dircache/Chip.C:176: error: 'm_Directory_dircache_vec' was
> not declared in this scope
>
> And in fact, there is no 'm_Directory_dircache_vec' in Chip.h, altought it's
> declared in .sm file
> Could you tell me what I'm doing wrong?
>
> Thank you so much
>
>
>
> > > > It depends on where the real directroy controller is in your system. 
> > You
> >
> > > > can easily take an existing directory controller and add a cache to it.
> > > > You can change the getState() function in the Directory controller to
> > > > return a different state if the directory entry is cached.  Actions
> > > > triggered by events to these cached states will use a lower latency.
> > > > However this approach isn't "on chip" unless your directory/memory
> > > > controller is on-chip as well.
> > > >
> > > > --Mike
> > > That's what I'm trying to do. But I'm getting problems.
> > > Can I use the CacheMemory type to model directory cache, or do I have to
> > code my
> >
> > > own cache type?
> > Yes, you can use CacheMemory to model any finite-sized cache of any Tag
> > structure (Entry) you define.  However I believe CacheMemory uses the
> > BLOCK_SIZE parameter for calculating the index, and this may not work for
> > you.  Hence you might simply want to copy CacheMemory.h to your own file
> > and make modifications where appropriate (like mapping to the index)
> >
> > --Mike
> >
> >
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