Re: [Gems-users] CPU accesses to L2 cache

["Daniele Bordes" <daniele.bordes@xxxxxxxxx>]

Thank you very much for your quick reply, Dan. I try to answer your questions.
I obserbed cpu0 in two different cases:

  1)  Idle command shell
  2)  Full simulation of Ocean  (4 threads, statically bound on CPU1,
CPU3, CPU5, CPU7)

and in both cases I observed number of cpu0 accesses was much greater
than other ones.

In both cases, here are some cache parameters:

protocol:  MOESI_CMP_NUCA
g_NUCA_PREDICTOR_CONFIG: DNUCA
ENABLE_MIGRATION: true
   (so yes, it's DNUCA protocol)


Here are two outputs regarding full Ocean Simulation:

Ruby_cycles: 3678981785
instruction_executed: 6472573309