[Gems-users] instruction-cache-access-trace

["Dave Z." <zhu_dave@xxxxxxxxx>]

Hello,

I've upgraded my Simics to 3.0.22. When I do
instruction-fetch-mode instruction-fetch-trace, I get
the following output:

[cpu0 info] Note that on this cpu,
instruction-fetch-trace is implemented using
instruction-cache-access-trace with a suitable cache
line size.
[cpu1 info] Note that on this cpu,
instruction-fetch-trace is implemented using
instruction-cache-access-trace with a suitable cache
line size.

Do I need to change anything in my configuration to
make it work the way it worked in Simics 2.2.19? I
wouldn't want to get different simulation results.

Thanks,

DZ


 
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