Re: [Gems-users] cache request round-trip latency

[Yuho Jin <yuho@xxxxxxxxxxx>]

Thank you for your suggestion.

Yuho

On Sun, 8 Oct 2006, Greg Byrd wrote:

> One approach would be to add timestamps to the messages, and make sure
> that the get copied when you transform one message (e.g., a request)
> into another (e.g., a response).  You can put as many timestamps as you
> want to track arrival/departure times at different components, which
> would then allow you to track latency components as you wish.
>
> ...gb
>
>
> Yuho Jin wrote:
> > Hello,
> >
> > I'm looking for hit/miss round-trip latency calculation
> > for MSI_MOSI_CMP_directory protocol in ruby.
> > After a cache request is generated from Sequencer,
> > and looks up L1 cache, L2 cache, or memory through a network,
> > it's very hard to keep track of one cache request.
> >
> > So, this is what I'm trying to do in ruby codes.
> > First, I'll try to insert start timestamp (clock) into one global table
> > for each request in Sequencer::makeRequest().
> > Whenever h (load completed) or hh (store completed) actions
> > happen in L1 cache, I can find the booked entry, measure the current
> > clock, and finally compute its latency as a difference.
> >
> > Does this make me figure out the round-trip time in the memory
> > hierarchy?
> >
> > Also is there any way to break down the round-trip latency for different
> > components?
> >
> > Thank you,
> > Yuho
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