Re: [Gems-users] Cache design in GEMS

["Lei Yang" <lya755@xxxxxxxxxxxxxxxxxxxx>]

Hi Nauman,

This helps a lot! I guess I should be looking at the protocols and slicc 
directory. Actually in "protocols", I saw a "doc" dir, in which there are 
two identical files with different names: 
MSI_dir_L1_MOSI_dir_L2_SNUCA_CMP-protocol-description.txt   and 
MSI_MOSI_CMP_directory_2level-protocol-description.txt . Should they have 
the name content or are they still under construction? I guess what I want 
to verify is whether the documentation provides accurate description of the 
protocols or not.
Thanks,
Lei
----- Original Message ----- 
From: "Nauman Rafique" <nrafique@xxxxxxxxxx>
To: "Lei Yang" <lya755@xxxxxxxxxxxxxxxxxxxx>; "Gems Users" 
<gems-users@xxxxxxxxxxx>
Sent: Monday, September 04, 2006 2:05 PM
Subject: Re: [Gems-users] Cache design in GEMS


> Opal mainly models the processor functionality. In addition to that, it 
> also has
> a simplistic cache model, and thats why you find some cache related files 
> there.
> Ruby is the more extensive model of the caches and the interconnects. If 
> you
> intend to modify cache design and analyze tradeoffs, you should not use 
> the
> cache model of opal. Opal should be simulating processor functionality and 
> ruby
> should be simulating caches. So you should be looking at CacheMemory.h in
> ruby/system.
>
> The behavior of caches in ruby is mostly programmed in slicc and the files 
> are
> located in gems/protocols directory. So write-back/write-through policy 
> would be
> controlled from over there. Moreover, for inserting victim cache, you will 
> have
> to modify the slicc code (I think you dont really need any modifications 
> in
> CacheMemory.h).
>
> So to start with, decide a coherence protocol you want to use (e.g MSI or 
> MOESI)
> and start digging into the corresponding slicc files.
>
> I hope it helps.
>
> --
> Nauman Rafique
> Purdue University
>
> Quoting Lei Yang <lya755@xxxxxxxxxxxxxxxxxxxx>:
>
> > Dear list,
> >
> > I just recently start using GEMS for my research project on new CMP cache
> > hierarchy designs. In my simulation I'll be using both ruby and opal. I 
> > was
> > trying to modify code that is related to the cache design, for example,
> > insert a victim cache between L1 and L2. However I found in ruby/system a
> > CacheMemory.h, also in opal/system cache.C and cache.h files. I am 
> > wondering
> > which one(s) should I be looking at? Also, where in the code is the
> > write-back/write-through policy specified for L1 and L2?
> >
> > Your comments are greatly appreciated. Thanks a lot!!
> >
> > Lei