For each CMP chip, each private L1 cache (instruction and data) has its
own LRU stack, and the shared unified L2 cache has a single LRU stack.
The L2 LRU stack is potentially updated by all the cores on the CMP chip.
Luke
On Sat, 16 Sep 2006, Li Shengmei wrote:
> Hi, I have some questions about cache replacement the gems implements in CMP.
> When LRU is implemented in CMP, does every core of CMP has its own LRU queue or there exist only one LRU queue?
> If there exist only one LRU queue, what is the rule of forming the queue?
>
> Thanks a lot.
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> Li Shengmei
> 2006-09-16
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