Dear list,
I have a question
regarding the released LogTM SLICC protocols. In both MOESI and MESI LogTM
protocols, when a store is received during a transaction (event: Store_XACT)
and the block is in any “ready-to-be-modified” state (such as M or MM
in MOESI, or M or E in MESI) the W bit of the cache line must be set. However, instead of directly setting this W bit, the protocol
performs the following series of actions (among others):
· i – allocate a TBE
· xt – set the transactional flag (TBE[address].Trans)
in the TBE
· xiw – set the W bit in the cache line IF the
TBE is marked TRANS
· s – deallocate TBE
It is not obvious to me why the reservation of the TBE is necessary,
given that no message is sent to the network and no reply is awaited. In fact,
given that the transaction is atomic, the only “visible” effect
might be that the transaction wouldn’t occur if there wasn’t a free
TBE. I don’t know if this is a simulation artifact, for example for
profiling purposes (the reservation of the TBE has some append_transition_comment
calls), or there is some real reason to not directly set the bit (or maybe only
historical reason). The final detail is that the bit R IS directly set when a
load_XACT event happens.
Someone can help? Thanks in advance,
Enrique Vallejo Gutiérrez
University of Cantabria, Spain