Re: [Gems-users] Deadlock avoidance in Gems


Date: Wed, 4 Apr 2007 10:14:32 +0800
From: "hongxia sun" <sunhx.seraph@xxxxxxxxx>
Subject: Re: [Gems-users] Deadlock avoidance in Gems
Hi Niket,
 
I think you are right. But the vnet number is not assigned differently for each Message buffer. You should guarantee that a msg from its source Message buffer to its destination Message buffer in the same vnet. For example, a L1_Request_to_L2_Cache enters into Message buffer with vnet "1" in L1 Cache controller should reach the Message buffer with same vnet "1" in L2 Cache controller.
 
About your second question, you can look at Sequencer.C as Greg suggested. In fact, a memory transition is send from simics through calling "mh_memorytracer_possible_cache_miss" in GEMS/ruby/simics/commands.C and then go into SimicsDriver::makeRequest to call corresponding processor's SimicsProcessor:makeRequest. From here, the request will go into Sequencer::makeRequest and register this request into EventQueue. At the same time, this request is sent to mandatoryQueue. When the request is service, it will call "hitCallback" action in L1 cache controller. And this "hitCallback" will call SimicsDriver and SimicsProcessor. And In the SimicsProcessor::hitCallback, it will unstall simics, in other word, wakeup simics.
 
Hope it can be help.
 
Best Regards,
Hongxia SUN

 
[← Prev in Thread] Current Thread [Next in Thread→]