Re: [Gems-users] Help needed in L2 request/response buffers in Ruby & in binding processes to cores

["Michael Hart" <mahart110@xxxxxxxxx>]

Good luck with your defense Mike, you have consistently, thoroughly and quickly have answered
all the questions I have seen since I registered for this mailing list.  Your response to my question
has personally helped me and our research group along.  Thanks again and good luck.

michael

On Dec 11, 2007 9:29 PM, Mike Marty <mike.marty@xxxxxxxxx> wrote:

Tushar,

I would recommend looking at the SLICC specifications instead of trying to reason about the system by examining the generated .C files. 

Unfortunately with my PhD defense next week, I do not have time to dig into code to answer your questions.

--Mike

On Dec 11, 2007 6:07 PM, Tushar Krishna (tkrishna@xxxxxxxxxxxxx ) <tkrishna@xxxxxxxxxxxxx > wrote:

Hi all,

In the L2Cache_Controller, does the m_L2Cache_responseFromL2Cache buffer send back requests and acks only to the L1 cache or does it also send acks to the Directory? And similarly does the responseToL2Cache buffer only get the responses from the Directory or does it also get any messages from L1?

Essentially I want to confirm if the following ordering is correct?

m_L2Cache_L1RequestToL2Cache_vec = data/instr requests and acks to L2 from L1
m_L2Cache_DirRequestFromL2Cache_vec = data/instr requests and acks to directory from L2
m_L2Cache_responseToL2Cache_vec = data/instr responses and acks from directory to L2
m_L2Cache_responseFromL2Cache_vec = data/instr responses and acks from L2 to L1


Also, could anybody tell me how one can bind processes to the cores they start on in simics? How do we use pset_bind?
Im using MSI_MOSI_CMP_directory protocol with 16 cores on one chip.

Thanks
Tushar
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