Hello,
I'm trying to modify MOESI_SMP_hammer to make it
behave like the original AMD hammer protocol.
Basically, I have changed (MM, Other_GETS, I) to (MM,
Other_GETS, O) and (M, Other_GETS, O) to (MM,
Other_GETS, S) in MOESI_SMP_hammer-cache.sm. In my
benchmarks, the data is shared between two threads
where one thread writes to the data and the other
reads the data. So, the transitions for the GEMS'
version (writer thread) are roughly
I->IM->MM_W->MM->I. In my modified version, it should
be I->IM->MM_W->MM->O. But I don't see MM->O. Instead,
there is a lot of L1_to_L2 events. So, I was wondering
if I should have modified something else to make it
behave like the way I wanted.
Thank you.
Dave
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