Re: [Gems-users] failed assertion


Date: Mon, 12 Mar 2007 16:33:39 -0500
From: Kevin Moore <kmoore@xxxxxxxxxxx>
Subject: Re: [Gems-users] failed assertion
Dave,
Yes, if you're going to use SimicsProcessor, you have to add an entry to m_active_requests for every call to Sequencer::makeRequest. It sounds like the behavior you'd like, is to call Sequencer->makeRequest on a prefetch, then ignore that request, when it completes. Is that right? If so, you'll have to add code SimicsProcessor so that it can distinguish between one of your added prefetch requests and a normal instruction-triggered memory request in hitCallback.

--Kevin

Dave Z. wrote:
No, I'm not adding an entry to m_active_requests. I
wonder if I should though. What I'm trying to do is to
get some data addresses from the user program via
magic calls, and then call makeRequest and trigger
some events in the controller. I have already defined
the events, but I guess there is a problem before the
request is received by the controller. Don't you think
this has something to do with the data addresses not
being aligned?

Thanks,

Dave


--- Kevin Moore <kmoore@xxxxxxxxxxx> wrote:

Dave,
	Look at the comment above the assertion in
SimicsProcessor.C. Your protocol is calling 'hitCallback' with an address that the SimicsProcessor is not waiting on. Are you calling makeRequest in the Sequencer without adding an entry to m_active_requests in SimicsProcessor? If not, it would help if you describe what it is that you are doing. Thanks,

Kevin

On Mar 12, 2007, at 2:28 PM, Dave Z. wrote:

Can this be due to the data address not being
aligned
with data blocks? For example, when I look at the
trace, I see transitions on addresses d89b5900,
d89b5940, d89b5980, etc. But the address I'm
trying to
fetch is d89b5f60. If this is the problem, is
there a
way to fix the address before I send the request
to
the sequencer?

Thanks,

Dave


--- Mike Marty <mikem@xxxxxxxxxxx> wrote:

Can you reproduce this without running your own
modifications?

No, I'm not running LogTM. I'm working on a
prefetching mechanism, basically trying to send
some
data to a specific processor.

Thanks.

--- Mike Marty <mikem@xxxxxxxxxxx> wrote:

How did you produce this assertion?  You aren't
running LogTM, right?

Hello,

What does the following assertion mean?

failed assertion 'm_lingering_request_address
!=
Address(0-1)' at fn void
SimicsProcessor::hitCallback(SubBlock&) in
simics/SimicsProcessor.C:244

Thank you for your help!

Dave




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