[Gems-users] configuring latencies in MOESI_CMP_directory_m protocol

[Philip Garcia <pcgarcia@xxxxxxxx>]

I want to double check on some of the latency settings made in GEMs  
before I run some tests.  I am trying to determine how the latencies  
are calculated.
The L1 cache access latency should just be  
SEQUENCER_TO_CONTROLLER_LATENCY.
If the data misses in the L1, but is in the local L2, the latency  
should also add in L1_REQUEST_LATENCY
if the data misses in the L2, but is found in another chips L2 (or  
L1's) caches, what is the latency added, I think this is  
L2_REQUEST_LATENCY, but I could be wrong here.
The latency for an L2 cache responding with data to another L2 cache  
is ?
And I think the response the latency for the local chip's L2 to send  
data to the L1 cache is just L2_RESPONSE_LATENCY
and the DIRECTORY latency is just DIRECTORY_LATENCY, however I'm not  
too concerned with this latency when compared to the other ones.
If anyone can clarify what the above latencies are, I'd greatly  
appreciate it.  I'm currently playing with them to try and figure out  
exactly which latencies are which, however I'd rather know for sure  
what each of these corresponds to.
thanks,
Phil