Hello,
I am experiencing an interesting problem, and was wondering if anyone
else has experienced similar problems. If I'm running simulations in
GEMS 2.1/simics 3.0.31 using a bagle (ultrasparc linux) target. The
issue I've noted is a very rare occurrence, but appears to happen if a
timer interrupt occurs at the same time another system interrupt
occurs. In general, the only external interrupt I see is the UART
interrupt, which is triggered when applications write to the simics
console. Under the proper circumstances I've noticed that the UART
interrupt will basically lock up (freezing the firehose controller
that issues interrupts), and halts outputting to the console. The
application that initiated the UART write will lock up as well, as it
is unable to finish outputting to the console. In my system, I rely
on other interrupts on the firehose controller issuing interrupts,
which cease to work, causing all simulated processors to eventually
lock up. I have prevented this bug from occurring by not issuing my
interrupts at the same time as timer interrupts and vice versa.
However, I have no control over the UART interrupts and thus can't
prevent them from occurring at the same time. This actual bug occurs
very rarely in my application (Xvid encoding that only outputs at the
end of each frame), but it is still noticeable (I experienced it once
in ~100Billion cycles of simulating a 4 processor system - different
simulations from the same checkpoint...).
Has anyone else experienced similar behavior when outputting to the
simulated console when running GEMS? I know I could "solve" this
problem by redirecting stdout to /dev/null, but it doesn't seem like
the ideal solution. I'm just curious to see if anyone has seen any
similar (or unexplained) bugs when running their simulations. The
best way to notice this has happened is by examining the console
output from simics, and seeing that the output is obviously truncated
in unexpected ways (in my case Xvid wrote half the frame information
to the console and hung up, and this occurred a few hundred million
cycles before I finished running the simulation). I will likely cross
post this over on the simics forum to see if anyone there can help as
well, but I'd really like to get to the root of what is going on here.
Phil
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