Re: [Gems-users] about L1D_cache cache stats


Date: Mon, 26 Oct 2009 06:49:25 -0600
From: Dan Gibson <degibson@xxxxxxxx>
Subject: Re: [Gems-users] about L1D_cache cache stats
(1) GEMS is a full-system simulator -- if there's even one other user process on your system, its eligible to be scheduled on your other cores. It could be your shell process, for instance.
(2) The most likely reason to not see any instruction requests would be failure to pass the 'instruction-fetch-mode instruction-fetch-trace' command to Simics.

Regards,
Dan

2009/10/26 shanshuchang <shanshuchang@xxxxxxxxx>
Hi all,
 
I used MOESI_CMP_directory to run barnes and dump the ruby statistics results, here I have some questions:
(1) ./barnes < input_8p.8192, I have already bind the thread to the first 8 cores of my 16-p CMP system. Also I bypass the supervisor memory access to ruby so the supervisor access never misses.
 
The ruby statistic results:
 
total_misses: 394316 [ 68337 44683 45311 49304 49326 42877 42375 51622 55 55 0 0 165 0 0 206 ]
user_misses: 394316 [ 68337 44683 45311 49304 49326 42877 42375 51622 55 55 0 0 165 0 0 206 ]
 
It seems that some workload-free cores encounters some user_misses, so what are these misses stand for?(I were supposing that no user_misses for the workload-free core) 
 
(2) According to "Simics Driver Transaction Stats", there isn't any instruction request, why ?
 
Simics Driver Transaction Stats
    ----------------------------------
    Insn requests: 0
    Data requests: 410322293
 
(in simic command line, I have set instruction-fetch-mode instruction-fetch-trace.)
 
 
Thanks
shuchang

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