Re: [Gems-users] a question about directory access

[Gregory Byrd <gbyrd@xxxxxxxx>]

The CMP protocols use a shared L2.  Cache lines are mapped to L2 modules by their address.  The "home" L2 for a particular address is responsible for keeping track of L1 copies.  So an L1 miss first goes to the home L2.  If there's a cached copy on chip, it will be there.  If not, the L2 sends the miss to the proper directory to get data from memory.

...Greg

On Tue, Aug 30, 2011 at 10:58 AM, Hui Zhao <hzhao5@xxxxxxxxx> wrote:

Hi

   For those who understand the directory in memory/cache hierarchy, can you help me with this question?

I am running a simulation with MSI_MOSI_CMP_DIRECTORY protocol. From the trace I generate, when one address is missing in L1 cache, message is sent from

 L1 --> L2,

L2---> directory,

directory -->L2

L2-->L1.

 

This path seems like the directory acts as  a memory controller to get data from memory.

While my expected trace will be like

L1--->directory

directory-->L2

L2--->directory (or L1).

 

Can anyone explain why it is not like this?

 

Thanks

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