Re: [Gems-users] 来自lisa890608的邮件


Date: Wed, 21 Dec 2011 15:35:16 -0500
From: "abhisekpan@xxxxxxxxx" <abhisekpan@xxxxxxxxx>
Subject: Re: [Gems-users] 来自lisa890608的邮件

Sorry for the delay!

The object memory_transaction_t* mem_trans has a field mem_trans->s.type.  For instructions this field is set to Sim_Trans_Instr_Fetch. This object can be found in SimicsDriver.C and you can track it from there.
For example, please look at the SimicsDriver::isUnhandledTransaction() method. It uses the mem_trans->s.type field.

The parameter m_is_instruction cache is simply used to differentiate between a data and instruction cache.

Best,
Abhisek
 
2011/12/20 lisa890608 <lisa890608@xxxxxxx>
As we know L1Cache is split into ICache an DCache.I want to know if L2 cache can tell instruction and data apart?and
what does the parameter "bool m_is_instruction_cache" in cacheMemory.h mean?any help will be appreciated.
Thanks alot



_______________________________________________
Gems-users mailing list
Gems-users@xxxxxxxxxxx
https://lists.cs.wisc.edu/mailman/listinfo/gems-users
Use Google to search the GEMS Users mailing list by adding "site:https://lists.cs.wisc.edu/archive/gems-users/" to your search.





--
Abhisek
Live Long and Prosper
[← Prev in Thread] Current Thread [Next in Thread→]