Date: | Thu, 30 Jun 2011 16:15:48 +0800 (CST) |
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From: | jianhual@xxxxxxxxxxxxxxxx |
Subject: | [Gems-users] How to collect multicore coherence traffic |
Hi All, I am a newbie to GEMS. Now, I want to utilize GEMS framework to collect the cache coherence traffic of real applications running on a multicore platform. Imagine that I use the directory coherence protocol for a 16-core CMP with private L1 cache and shared L2 cache (NUCA-like). How can I collect the various on-chip traffic, such as the L2 read, L2 write and L1 invalidate, etc. Where can I add codes in the GEMS to implement such function? In SLICC or somewhere? Thanks in advance. Regards, Jianhua |
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