[Gems-users] fattree and 3-stage Clos topology

["Chunyong Lin" <cl1577@xxxxxxx>]

I am suffering two problems, appreciate if you can give me some suggestion.

(1)    I am using FILE SPECIFIED to generate a 3-stage Clos network, also I changed some code in Topoplogy::makeFileSpecified(), each stage has 3 router, and each router has 4 inputs and 4 outputs, link is single direction. Ruby compiling is success, but when ruby0.init, simulation is corrupted. The error output is:

***glibc detected *** /opt/virtutech/simics3/x86-linux/bin/simics-common: corrupted double-linked list: ***

It seems it try to release the memory which already free. I couldn’t find what’s wrong here.

(2)    Using FILE_SPECIFIED to generate fattree for 3 –stage Clos network without changing code. Each router has 4 inputs and 4 outputs, what if input 1 want to go to output 3, is it will just be routed in current router? I want it go to middle stage, then go back.

Please let me know if you need more information. Thanks.

 

 

With kind regards,

Chunyong Lin (Emma)

Master of Computer Engineering

Polytechnic Institute of New York University