Re: [Gems-users] MOESI_CMP_directory protocol : Invalid Transition

[Mike Marty <mikem@xxxxxxxxxxx>]

Hi,

I think the L2 controller needs to NACK in this scenario.  This particular
path must have never occurred when I developed/debugged the protocol.
These L1-L2 writeback races, with forwarded requests, are nasty.

Please try adding OLSX to the transition on line 1485 of
MOESI_CMP_directory-L2cache.sm

  transition({I, M, O, ILS, ILOX, OLS, SLS, OLSX, S}, L1_PUTX) {
    ll_writebackNack;
    o_popL1RequestQueue;
  }


Same thing for the L1_PUTS in state ILOX.  Change line 1942 to as follows:

  // new exclusive happened while sharer attempted writeback
  transition({ILX, ILOX}, {L1_PUTS, L1_PUTS_only, L1_PUTO}) {
    ll_writebackNack;
    o_popL1RequestQueue;
  }




--Mike




> Hi
>
> I modified the MOESI_CMP_directory protocol to
> incorporate my dram simulator - but did nto add nay
> additional states. I was using the tester to test that
> I did not have any invalid transitions/deadlocks due
> to my modifications and came across an event that the
> original protocol did not handle.
>
> The combinations is the event L1_PUTX arriving when
> the state of the block in the L2 Cache Controller is
> OLSX.
>
> Thanks
> Brinda
>
>
>
>
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