RE: [Gems-users] Modify Cache Parameters to get rid of L2 cache

[Mike Marty <mikem@xxxxxxxxxxx>]

> Thanks Mike but I still am not able required statistics...
> I did the following
> I used the MOSI_SMP_bacst_1level protocol in the make PROTOCOL
> command, deleted the MOSI_SMP_bcast directory (using make
> clean), then ran the quickstart commands to load checkpoint
> etc  but the stats file still dumps statistics such as
>
> Ruby Configuration
> ------------------
> protocol: MOSI_SMP_bcast
> simics_version: simics-2.0.25
> compiled_at: 21:20:19, Apr  7 2005
> RUBY_DEBUG: false
> ......
> ...
> ..
> ..
> ...
> L1_CACHE_ASSOC: 4
> L1_CACHE_NUM_SETS_BITS: 8
> L2_CACHE_ASSOC: 4
> L2_CACHE_NUM_SETS_BITS: 16
> g_MEMORY_SIZE_BYTES: 4294967296
> g_DATA_BLOCK_BYTES: 64
> g_PAGE_SIZE_BYTES: 4096
> g_NUM_PROCESSORS: 4
> g_NUM_L2_BANKS: 4
>


These settings will be printed regardless of whether the chosen protocol
actually uses them.  For example, the MOSI_SMP_bcast_1level protocol will
*not* use the L2_CACHE_ASSOC and L2_CACHE_NUM_SETS_BITS parameters.


>
> I have a feeling that the load-module is not loading the
> correct ruby module (even after compilation). I checked this
> by adding a "cout" statement in the init.C file and using the
> ruby0.init command on the simics prompt....
> Is there any other file in the $GEMS folder that needs to be
> changed to recognize the new PROTOCOL setting?
>

load-module will load whatever Ruby module exists in the ./modules
directory from wherever you launch the simics executable.

> Regarding setting the associativity in the
> MOSI_SMP_bcast-cache.sm ....I think it still depends on the
> L1_CACHE_ASSOC parameter which is set in the
> rubyconfig.defaults file. I looked at the following lines of
> code in the MOSI_SMP_bcast-cache.sm file
>
> CacheMemory L1IcacheMemory, template_hack="<L1Cache_Entry>",
> constructor_hack='L1_CACHE_NUM_SETS_BITS,L1_CACHE_ASSOC,MachineType_L1Cache,int_to_string(i)+"_L1I"',
> abstract_chip_ptr="true";
>
>  CacheMemory L1DcacheMemory, template_hack="<L1Cache_Entry>",
> constructor_hack='L1_CACHE_NUM_SETS_BITS,L1_CACHE_ASSOC,MachineType_L1Cache,int_to_string(i)+"_L1D"',
> abstract_chip_ptr="true";
>

Right.  If you want the L1I and L1D caches to have a different
associativity, then you need to either hard-code the values in the lines
above or add more parameters such as L1I_CACHE_ASSOC and L1D_CACHE_ASSOC.

--Mike