RE: [Gems-users] Modify Cache Parameters to get rid of L2 cache


Date: Sun, 19 Jun 2005 12:45:56 -0400
From: <adash@xxxxxxx>
Subject: RE: [Gems-users] Modify Cache Parameters to get rid of L2 cache
Thanks Mike but I still am not able required statistics... 
I did the following
I used the MOSI_SMP_bacst_1level protocol in the make PROTOCOL
command, deleted the MOSI_SMP_bcast directory (using make
clean), then ran the quickstart commands to load checkpoint
etc  but the stats file still dumps statistics such as 

Ruby Configuration
------------------
protocol: MOSI_SMP_bcast
simics_version: simics-2.0.25
compiled_at: 21:20:19, Apr  7 2005
RUBY_DEBUG: false
......
...
..
..
...
L1_CACHE_ASSOC: 4
L1_CACHE_NUM_SETS_BITS: 8
L2_CACHE_ASSOC: 4
L2_CACHE_NUM_SETS_BITS: 16
g_MEMORY_SIZE_BYTES: 4294967296
g_DATA_BLOCK_BYTES: 64
g_PAGE_SIZE_BYTES: 4096
g_NUM_PROCESSORS: 4
g_NUM_L2_BANKS: 4


I have a feeling that the load-module is not loading the
correct ruby module (even after compilation). I checked this 
by adding a "cout" statement in the init.C file and using the
ruby0.init command on the simics prompt....
Is there any other file in the $GEMS folder that needs to be
changed to recognize the new PROTOCOL setting?

Regarding setting the associativity in the
MOSI_SMP_bcast-cache.sm ....I think it still depends on the 
L1_CACHE_ASSOC parameter which is set in the
rubyconfig.defaults file. I looked at the following lines of
code in the MOSI_SMP_bcast-cache.sm file

CacheMemory L1IcacheMemory, template_hack="<L1Cache_Entry>",
constructor_hack='L1_CACHE_NUM_SETS_BITS,L1_CACHE_ASSOC,MachineType_L1Cache,int_to_string(i)+"_L1I"',
abstract_chip_ptr="true";

 CacheMemory L1DcacheMemory, template_hack="<L1Cache_Entry>",
constructor_hack='L1_CACHE_NUM_SETS_BITS,L1_CACHE_ASSOC,MachineType_L1Cache,int_to_string(i)+"_L1D"',
abstract_chip_ptr="true";

Please correct me if I am wrong.
I will greatly appreciate your help in figuring out how to use
the MOSI_SMP_bcast_1level protocol to generate stats for the
splash benchmarks.

Thank you.
AD

---- Original message ----
>Date: Sat, 11 Jun 2005 16:07:39 -0500
>From: "Mike Marty" <mikem@xxxxxxxxxxx>  
>Subject: RE: [Gems-users] Modify Cache Parameters to get rid
of L2 cache  
>To: <adash@xxxxxxx>, "'Gems Users'" <gems-users@xxxxxxxxxxx>
>
>If you don't care about split I&D L1 caching, then just use
>MOSI_SMP_bcast_1level which is a single cache per processor.  
>
>Otherwise use MOSI_SMP_bcast which manages an L1 I&D and L2
in the same
>controller.  However I'm not sure how it will behave with the
L2 cache set
>as 0 and in fact we have an assertion, in ruby/RubyConfig.C,
to enforce that
>there is at least 1 set for L2 cache bank.  Would setting the
cache size to
>a single set be good enough?  If not, modify
MOSI_SMP_bcast_1level-cache.sm
>to have split L1 caches.  This should be pretty
straightforward by comparing
>the differences between MOSI_SMP_bcast-cache.sm and
>MOSI_SMP_bcast_1level-cache.sm
>
>Regarding setting different associativities for the L1 I&D
caches, this
>should be pretty straightforward.  You will need to modify the
>MOSI_SMP_bcast-cache.sm file so that it uses a different
parameter when
>instantiating the 2 L1 cache memories (search for
"CacheMemory").  
>
>
>> -----Original Message-----
>> From: gems-users-bounces@xxxxxxxxxxx [mailto:gems-users-
>> bounces@xxxxxxxxxxx] On Behalf Of adash@xxxxxxx
>> Sent: Saturday, June 11, 2005 3:44 PM
>> To: gems-users@xxxxxxxxxxx
>> Subject: [Gems-users] Modify Cache Parameters to get rid of
L2 cache
>> 
>> I want to generate statistics using the ruby module for the
>> following
>> configuration
>> 
>> a.there is no L2 cache
>> b.32K 2-way set associative L1 cache and 32K direct-mapped L1
>> cache
>> c.number of processors :4
>> d.PROTOCOL:MOSI_SMP_bcast
>> e.The benchmarks are Splash benchmark FFT
>> 
>> I changed the cache configurations in the
>> /GEMS/ruby/config/rubyconfig.defaults
>> file by setting the L2 cache lines to 0 as shown below however
>> I do not see any change in the
>> new stats files.
>> 
>> L1_CACHE_ASSOC: 2
>> L1_CACHE_NUM_SETS_BITS: 8
>> L2_CACHE_ASSOC: 0
>> L2_CACHE_NUM_SETS_BITS: 0
>> 
>> Could anyone please point out which other files need to be
>> change to achieve the objective? or what
>> is the best way to do this.
>> 
>> Thanks a lot for your help
>> _______________________________________________
>> Gems-users mailing list
>> Gems-users@xxxxxxxxxxx
>> https://lists.cs.wisc.edu/mailman/listinfo/gems-users
>
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