Re: [Gems-users] Relation between SIMICS cycle & GEMS cycle

["Min Xu (Hsu)" <xu@xxxxxxxxxxx>]

On Thu, 30 Mar 2006 Weihang Jiang wrote :
> > Thanks. I didn't know this before. In simics, however, I suspect
> > you cannot just modify the registers and expect things will work out.
> > (e.g., you can change the tick register from 100-simics-time to
> > 200-gems-time when solaris reads the register. Then solaris write
> > the tick_compare with 200-gems-time + 100-gems-time=300-gems-time.
> > But simics will interrupt at 300-simics-time, which might be
> > 500-gems-time.)
> 
> Why do you think so? It says, "The TICK_COMPARE register causes the
> processor to generate a trap when the TICK register reaches the value
> in the TICK_COMPARE register  ... ". So, if we keep updating the
> values of TICK register at the end of each GEMS cycle, the interrupt
> will be correctly triggered based on GEMS time.

This is from the processor manual, not the simics manual. ;-)

Triggering of the interrupt is inside simics. When you update the
tick register, simics may not see it.

> >I still think you need to modify the simics cycle
> > count, which is perhaps used to generate the value in the tick
> > registers in the first place.
> >
> 
> I agree on this. But I have no idea how to achieve this. Maybe we can
> delay some cycles for each instructions to make SIM cycles == GEMS
> cycles.

Yes, that's what I would first try also.