Re: [Gems-users] Ruby and Simics stall flag

[Yangchun Luo <yluo@xxxxxxxxxx>]

Interesting topic.

However, my experience is that it is not the option -stall that causes L1I misses to show up.

It is whether opal is loaded or not.

I experimented with 4 core 75MHz abisko/serengeti machine

With ruby loaded, -stall and no -stall, for running 75,000,000 cycles (do nothing)
No L1I misses showed up.

With both ruby and opal loaded,
* with -stall, for running 5000 cycle: (do nothing)
L1I_cache cache stats: 
  L1I_cache_total_misses: 139
  L1I_cache_total_demand_misses: 139
  L1I_cache_total_prefetches: 0
  L1I_cache_total_sw_prefetches: 0
  L1I_cache_total_hw_prefetches: 0
  L1I_cache_misses_per_transaction: 139
  L1I_cache_misses_per_instruction: 0.000954546
  L1I_cache_instructions_per_misses: 1047.62

* without -stall, for running 5000 cycle: (do nothing)
L1I_cache cache stats: 
  L1I_cache_total_misses: 140
  L1I_cache_total_demand_misses: 140
  L1I_cache_total_prefetches: 0
  L1I_cache_total_sw_prefetches: 0
  L1I_cache_total_hw_prefetches: 0
  L1I_cache_misses_per_transaction: 140
  L1I_cache_misses_per_instruction: 0.0013147
  L1I_cache_instructions_per_misses: 760.629


On 3/22/07, Dan Gibson <degibson@xxxxxxxx> wrote:
> Aha! The difference between Ruby/Stall and Ruby/NoStall becomes clear:
>
> Ruby/Stall:
>
> L1I_cache cache stats:
>   L1I_cache_total_misses: 234
>   L1I_cache_total_demand_misses: 234
>
>   L1I_cache_total_prefetches: 0
>   L1I_cache_total_sw_prefetches: 0
>   L1I_cache_total_hw_prefetches: 0
>   L1I_cache_misses_per_transaction: 234
>   L1I_cache_misses_per_instruction: 9.00187e-05
>   L1I_cache_instructions_per_misses: 11108.8
>
>
> Ruby/NoStall:
>
> L1I_cache cache stats:
>   L1I_cache_total_misses: 0
>   L1I_cache_total_demand_misses: 0
>   L1I_cache_total_prefetches: 0
>   L1I_cache_total_sw_prefetches: 0
>   L1I_cache_total_hw_prefetches: 0
>
>   L1I_cache_misses_per_transaction: 0
>   L1I_cache_misses_per_instruction: 0
>   L1I_cache_instructions_per_misses: NaN
>
>
> It would seem that failing to specify -stall causes the instruction
> hierarchy to become unstallable (aka perfect). This behaviour is
>
> actually somewhat like the x86 target...
>
> Regards,
> Dan

-- 
Yangchun