Re: [Gems-users] CPU accesses to L2 cache


Date: Fri, 27 Oct 2006 08:03:42 -0500
From: Dan Gibson <degibson@xxxxxxxx>
Subject: Re: [Gems-users] CPU accesses to L2 cache
Are you sure that you're not merely observing that all other cpus (cpu1-cpu7) are in the solaris idle loop? cpu0 is probably active only to respond to your keypresses and to fork your processes (ps -A, prstat, etc).

Also, did you issue instruction-fetch-mode instruction-fetch-trace, istc-disable, dstc-disable to Simics?

Try running a mulitthreaded benchmark, and be sure to use processor_bind() to get all the processors busy.

Regards,
Dan

Daniele Bordes wrote:

Dear Gems Users, I tried to run some simple simulations using Simics + Ruby.
The simulated machine is a 8-Sparc Processors with Solaris 9.
L2-cache is a D-NUCA cache with 256 banks.
I have noticed this fact (which seems to me strange) in ruby statistics:


In Ruby statistics, CPU0 number of accesses on L2-cache is MUCH
greater than other CPU's ones.

The fact is that I have set Solaris fsflush mechanism frequency to be
very very slow (by changing a parameter inside /etc/system and
rebooting), and if I type "ps -A" from simulated machine, I see only
this processes:

sched
init
pageout
fsflush
sh
ps


And if I type "prstat" inside simulated machine, I see this:

STATE     CPU    PROCESS
cpu3       0.0%     prstat
sleep      0.0%     sh
sleep      0.0%     init


So, in practice, the simulated machine seems to be "Idle", but there
are many accesses of CPU0 to L2 cache.

Since I am not a Solaris expert, does anybody know if this is correct?

I am sorry to be a nuisance.
Thank you very much.
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