Date: | Sun, 21 Jan 2007 01:44:29 +0800 |
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From: | 郭锐 <timmyguo@xxxxxxxxxxxxxxxx> |
Subject: | [Gems-users] A question in LogTM |
When an ld_xact/st_xact hits in a fast path, the request never goes to Cache Controller. The question is that, in such a situation, how the simulator sets up the R/W bit for the corresponding cache line? It seems that the simulator leaves the flag unchanged--be a big bug? If the problem do exists, how to get a quick fix? G.R. |
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