Mike,
Thank you for the reply. One more question about the protocol: I know it's mandatory to set the g_PROCS_PER_CHIP to 1 when using SMP protocols, but when using CMP protocols, can we also have one processor on a single chip? or do we need to guarantee at least 2 processors per chip when using CMP protocols?
Thanks,
Lide
On 7/29/07, Mike Marty <mikem@xxxxxxxxxxx> wrote:
>
>
> But I am still concerning the protocol as you mentioned. The protocol
> I am using now is MOESI_CMP_directory, and the 16p are placed on 16
> chips (1 p on 1 chip). Actually I want to observe the network behavior
> of a 16p CMP, but in order to utilize the auto-generated TORUS2D
> interconnet, I placed each processor on a single chip, but reduced the
> latencies to make the 16p communicate like on a single chip. Is it
> resonable to do this? Is there any restriction on the protocol can be
> used if I do so?
>
This is reasonable, but I'm not sure where the directory/memory
controllers are placed and plus the default TORUS2D code will create a
memory controller for every processor.
An alternative approach uses FILE_SPECIFIED topology.
--Mike
>
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