[Gems-users] Error with MessageBuffer when running tester

[Marco Solinas <marco.solinas@xxxxxxxxxxxx>]

Hi list,

I'm using GEMS 1.4, when I run the Random Tester, after a few 
transitions, the process aborts, telling me that for some queue the 
ordering has not been set.
I wrote my protocol from scratch, so I guess that the problem is related 
to some mistake I made, but actually I can't understand what's happening 
because I put a lot of debug messages everywhere in my code, and 
everything seems to work fine. I checked the MessageBuffer.C file, but I 
couldn't find nothing useful for me.
My protocol is a CMP protocol, and uses 3 virtual network, 1 ordered and 
2 unordered.
Any idea of what's wrong? Maybe some mistake in my configuration?

Below you have the output I got from the tester.
Thanks a lot for your support.
Regards,
Marco.

user@host:/hd200/user/gems/ruby$ 
./x86-linux/generated/MESI_CMP_directory/bin/tester.exec -p 2 -l 10000 -s 1
Parsing command line arguments:
 length of run = 10000
 debug start cycle = 1
Ruby Timing Mode
Creating event queue...
Creating event queue done
Creating system...
 Processors: 2
Creating system done
Ruby initialization complete

================ Begin System Configuration Print ================

Ruby Configuration
------------------
protocol: MESI_CMP_directory
compiled_at: 15:26:03, Feb 15 2008
RUBY_DEBUG: true
hostname: host
g_RANDOM_SEED: 1
g_DEADLOCK_THRESHOLD: 500000
g_FORWARDING_ENABLED: false
RANDOMIZATION: true
g_SYNTHETIC_DRIVER: false
g_SYNTHETIC_GENERATOR: barrier
g_DETERMINISTIC_DRIVER: false
g_FILTERING_ENABLED: false
g_DISTRIBUTED_PERSISTENT_ENABLED: true
g_DYNAMIC_TIMEOUT_ENABLED: true
g_RETRY_THRESHOLD: 1
g_FIXED_TIMEOUT_LATENCY: 300
g_trace_warmup_length: 1000000
g_bash_bandwidth_adaptive_threshold: 0.75
g_tester_length: 10000
g_synthetic_locks: 2048
g_deterministic_addrs: 1
g_SpecifiedGenerator: DetermGETXGenerator
g_callback_counter: 0
g_NUM_COMPLETIONS_BEFORE_PASS: 0
g_think_time: 5
g_hold_time: 5
g_wait_time: 5
PROTOCOL_DEBUG_TRACE: true
DEBUG_FILTER_STRING: none
DEBUG_VERBOSITY_STRING: none
DEBUG_START_TIME: 1
DEBUG_OUTPUT_FILENAME: none
SIMICS_RUBY_MULTIPLIER: 2
OPAL_RUBY_MULTIPLIER: 2
TRANSACTION_TRACE_ENABLED: false
USER_MODE_DATA_ONLY: false
PROFILE_HOT_LINES: false
PROFILE_ALL_INSTRUCTIONS: false
PRINT_INSTRUCTION_TRACE: false
BLOCK_STC: false
PERFECT_MEMORY_SYSTEM: false
PERFECT_MEMORY_SYSTEM_LATENCY: 0
DATA_BLOCK: true
REMOVE_SINGLE_CYCLE_DCACHE_FAST_PATH: false
g_SIMICS: false
L1_CACHE_ASSOC: 4
L1_CACHE_NUM_SETS_BITS: 2
L2_CACHE_ASSOC: 2
L2_CACHE_NUM_SETS_BITS: 3
g_MEMORY_SIZE_BYTES: 268435456
g_DATA_BLOCK_BYTES: 64
g_PAGE_SIZE_BYTES: 4096
g_NUM_PROCESSORS: 2
g_NUM_L2_BANKS: 2
g_NUM_MEMORIES: 2
g_PROCS_PER_CHIP: 1
g_NUM_CHIPS: 2
g_NUM_CHIP_BITS: 1
g_MEMORY_SIZE_BITS: 28
g_DATA_BLOCK_BITS: 6
g_PAGE_SIZE_BITS: 12
g_NUM_PROCESSORS_BITS: 1
g_PROCS_PER_CHIP_BITS: 0
g_NUM_L2_BANKS_BITS: 1
g_NUM_L2_BANKS_PER_CHIP_BITS: 0
g_NUM_L2_BANKS_PER_CHIP: 1
g_NUM_MEMORIES_BITS: 1
g_NUM_MEMORIES_PER_CHIP: 1
g_MEMORY_MODULE_BITS: 21
g_MEMORY_MODULE_BLOCKS: 2097152
MAP_L2BANKS_TO_LOWEST_BITS: true
DIRECTORY_CACHE_LATENCY: 6
NULL_LATENCY: 1
ISSUE_LATENCY: 2
CACHE_RESPONSE_LATENCY: 12
L2_RESPONSE_LATENCY: 6
L1_RESPONSE_LATENCY: 3
COLLECTOR_REQUEST_LATENCY: 1
MEMORY_RESPONSE_LATENCY_MINUS_2: 78
DIRECTORY_LATENCY: 80
NETWORK_LINK_LATENCY: 40
COPY_HEAD_LATENCY: 4
ON_CHIP_LINK_LATENCY: 1
RECYCLE_LATENCY: 3
L2_RECYCLE_LATENCY: 5
TIMER_LATENCY: 10000
TBE_RESPONSE_LATENCY: 1
PERIODIC_TIMER_WAKEUPS: true
LOG_BASE: 4294967296
RETRY_LATENCY: 100
RESTART_DELAY: 1000
PROFILE_EXCEPTIONS: false
PROFILE_XACT: false
XACT_NUM_CURRENT: 0
XACT_LAST_UPDATE: 0
L1_REQUEST_LATENCY: 2
L2_REQUEST_LATENCY: 4
SINGLE_ACCESS_L2_BANKS: true
SEQUENCER_TO_CONTROLLER_LATENCY: 4
L1CACHE_TRANSITIONS_PER_RUBY_CYCLE: 32
L2CACHE_TRANSITIONS_PER_RUBY_CYCLE: 32
DIRECTORY_TRANSITIONS_PER_RUBY_CYCLE: 32
COLLECTOR_TRANSITIONS_PER_RUBY_CYCLE: 32
g_SEQUENCER_OUTSTANDING_REQUESTS: 16
NUMBER_OF_TBES: 128
NUMBER_OF_MATES: 4
NUMBER_OF_L1_TBES: 32
NUMBER_OF_L2_TBES: 32
FINITE_BUFFERING: false
FINITE_BUFFER_SIZE: 3
PROCESSOR_BUFFER_SIZE: 10
PROTOCOL_BUFFER_SIZE: 32
TSO: false
g_MASK_PREDICTOR_CONFIG: Random
g_TOKEN_REISSUE_THRESHOLD: 2
g_PERSISTENT_PREDICTOR_CONFIG: None
g_NETWORK_TOPOLOGY: HIERARCHICAL_SWITCH
g_CACHE_DESIGN: NUCA
g_endpoint_bandwidth: 10000
g_adaptive_routing: true
NUMBER_OF_VIRTUAL_NETWORKS: 4
FAN_OUT_DEGREE: 4
g_PRINT_TOPOLOGY: false
g_NUM_DNUCA_BANK_SETS: 32
g_NUM_DNUCA_BANK_SET_BITS: 0
g_NUM_BANKS_IN_BANK_SET_BITS: 0
g_NUM_BANKS_IN_BANK_SET: 0
PERFECT_DNUCA_SEARCH: true
g_NUCA_PREDICTOR_CONFIG: NULL
ENABLE_MIGRATION: false
ENABLE_REPLICATION: false
COLLECTOR_HANDLES_OFF_CHIP_REQUESTS: false
XACT_LENGTH: 2000
XACT_SIZE: 1000

Chip Config
-----------
Total_Chips: 2

L1Cache_mandatoryQueue numberPerChip: 1

L1Cache_sequencer numberPerChip: 1
sequencer: Sequencer - SC
 max_outstanding_requests: 16

L1Cache_L1IcacheMemory numberPerChip: 1
Cache config: L1Cache_L1I_0
 cache_associativity: 4
 num_cache_sets_bits: 2
 num_cache_sets: 4
 cache_set_size_bytes: 256
 cache_set_size_Kbytes: 0.25
 cache_set_size_Mbytes: 0.000244141
 cache_size_bytes: 1024
 cache_size_Kbytes: 1
 cache_size_Mbytes: 0.000976562

L1Cache_L1DcacheMemory numberPerChip: 1
Cache config: L1Cache_L1D_0
 cache_associativity: 4
 num_cache_sets_bits: 2
 num_cache_sets: 4
 cache_set_size_bytes: 256
 cache_set_size_Kbytes: 0.25
 cache_set_size_Mbytes: 0.000244141
 cache_size_bytes: 1024
 cache_size_Kbytes: 1
 cache_size_Mbytes: 0.000976562

L1Cache_TBEs numberPerChip: 1
TBEs_per_TBETable: 128

L2Cache_L2cacheMemory numberPerChip: 1
Cache config: L2Cache_L2_0
 cache_associativity: 2
 num_cache_sets_bits: 3
 num_cache_sets: 8
 cache_set_size_bytes: 512
 cache_set_size_Kbytes: 0.5
 cache_set_size_Mbytes: 0.000488281
 cache_size_bytes: 1024
 cache_size_Kbytes: 1
 cache_size_Mbytes: 0.000976562

L2Cache_TBEs numberPerChip: 1
TBEs_per_TBETable: 128

Directory_directory numberPerChip: 1
Memory config:
 memory_bits: 28
 memory_size_bytes: 268435456
 memory_size_Kbytes: 262144
 memory_size_Mbytes: 256
 memory_size_Gbytes: 0.25
 module_bits: 21
 module_size_lines: 2097152
 module_size_bytes: 134217728
 module_size_Kbytes: 131072
 module_size_Mbytes: 128


Network Configuration
---------------------
network: SIMPLE_NETWORK
topology: HIERARCHICAL_SWITCH

virtual_net_0: active, unordered
virtual_net_1: active, unordered
virtual_net_2: active, ordered
virtual_net_3: inactive


Profiler Configuration
----------------------
periodic_stats_period: 1000000

================ End System Configuration Print ================

Testing clear stats...Done.
Request trace enabled to output file 'ruby.trace.gz'
     2   0  -1        Seq               Begin       >       [0x62c0, 
line 0x62c0]
     4   0  -1        Seq               Begin       >       [0x39c0, 
line 0x39c0]
     6   1  -1        Seq               Begin       >       [0x2cc0, 
line 0x2cc0]
     6   0   0    L1Cache               Store      I>IM     [0x62c0, 
line 0x62c0]
     7   1   0    L1Cache               Store      I>IM     [0x2cc0, 
line 0x2cc0]
     8   1  -1        Seq               Begin       >       [0x59c0, 
line 0x59c0]
     8   0   0    L1Cache               Store      I>IM     [0x39c0, 
line 0x39c0]
    10   1   0    L1Cache               Store      I>IM     [0x59c0, 
line 0x59c0]
    10   1  -1        Seq               Begin       >       [0x2bc0, 
line 0x2bc0]
    12   1  -1        Seq               Begin       >       [0x43c0, 
line 0x43c0]
    13   1   0    L1Cache               Store      I>IM     [0x43c0, 
line 0x43c0]
    14   0  -1        Seq               Begin       >       [0x56c0, 
line 0x56c0]
    15   0   0    L1Cache               Store      I>IM     [0x56c0, 
line 0x56c0]
    16   0  -1        Seq               Begin       >       [0x7c0, 
line 0x7c0]
    18   0  -1        Seq               Begin       >       [0x34c0, 
line 0x34c0]
    20   0  -1        Seq               Begin       >       [0x37c0, 
line 0x37c0]
    21   0   0    L1Cache               Store      I>IM     [0x34c0, 
line 0x34c0]
    22   0  -1        Seq               Begin       >       [0x1ac0, 
line 0x1ac0]
    23   0   0    L1Cache         Replacement     IM>IM     [0x62c0, 
line 0x62c0]
    24   1  -1        Seq               Begin       >       [0x5dc0, 
line 0x5dc0]
    25   0   0    L1Cache         Replacement     IM>IM     [0x62c0, 
line 0x62c0]
    26   1  -1        Seq               Begin       >       [0x64c0, 
line 0x64c0]
    26   1   0    L1Cache               Store      I>IM     [0x5dc0, 
line 0x5dc0]
    26   0   0    L1Cache         Replacement     IM>IM     [0x62c0, 
line 0x62c0]
    28   0   0    L1Cache         Replacement     IM>IM     [0x62c0, 
line 0x62c0]
    28   1  -1        Seq               Begin       >       [0x4fc0, 
line 0x4fc0]
    29   0   0    L1Cache         Replacement     IM>IM     [0x62c0, 
line 0x62c0]
Warning: in fn void MessageBuffer::enqueue(const MsgPtr&, Time) in 
buffers/MessageBuffer.C:227: *this is [MessageBuffer: [PrioHeap: ]]
Warning: in fn void MessageBuffer::enqueue(const MsgPtr&, Time) in 
buffers/MessageBuffer.C:227: *this is [MessageBuffer: [PrioHeap: ]]
Warning: in fn void MessageBuffer::enqueue(const MsgPtr&, Time) in 
buffers/MessageBuffer.C:228: m_name is
Warning: in fn void MessageBuffer::enqueue(const MsgPtr&, Time) in 
buffers/MessageBuffer.C:228: m_name is
Fatal Error: in fn void MessageBuffer::enqueue(const MsgPtr&, Time) in 
buffers/MessageBuffer.C:229: Ordering property of this queue has not 
been set
Fatal Error: in fn void MessageBuffer::enqueue(const MsgPtr&, Time) in 
buffers/MessageBuffer.C:229: Ordering property of this queue has not 
been set
Aborted