[Gems-users] L1 cache to processor Latency

[Marco Solinas <marco.solinas@xxxxxxxxxxxx>]

Hi list,

I was wandering if it is possible to specify a L1cache to processor 
latency in case of hit. When a request message is peeked from the 
MandatoryQueue, and the requested block hits in L1cache, the transition 
invokes the callback action, that invokes the corresponding callback 
function of the sequencer. Is it possible to specify a "custom" response 
latency in such cases? In case it is possible, how can I do that? 
Otherwise, how many cycles this latency is assumed to be (and 
eventually, where it is specified)?
Thanks in advance for your support.
Regards
Marco