Re: [Gems-users] L1 cache to processor Latency

[Polina Dudnik <pdudnik@xxxxxxxxx>]

Please read this post and let us know if you have further questions

https://lists.cs.wisc.edu/archive/gems-users/2006-November/msg00055.shtml



Polina

On Mon, Feb 23, 2009 at 7:28 AM, Marco Solinas <marco.solinas@xxxxxxxxxxxx> wrote:

Hi list,

I was wandering if it is possible to specify a L1cache to processor
latency in case of hit. When a request message is peeked from the
MandatoryQueue, and the requested block hits in L1cache, the transition
invokes the callback action, that invokes the corresponding callback
function of the sequencer. Is it possible to specify a "custom" response
latency in such cases? In case it is possible, how can I do that?
Otherwise, how many cycles this latency is assumed to be (and
eventually, where it is specified)?

Thanks in advance for your support.
Regards
Marco


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