[Sigarch-members] SIGARCH-MSG: 2nd February 2007 Digest of SIGARCH Messages

["Doug Burger" <dburger@xxxxxxxxxxxxx>]

This is the 2nd February 2007 Digest of SIGARCH Messages (sigarch-feb07b):

* SC07 Call for Papers: 20th International Conference for High-Performance Computing, Networking, Storage and Analysis
  http://sc07.supercomputing.org/
  Submitted by Josep Torrellas <torrellas@xxxxxxxxxxx>

* HOTCHIPS 19 Call for Papers: A Symposium on High-Performance Chips (HOTCHIPS - 2007)
  http://www.hotchips.org
  Submitted by Don Draper <ddraper@xxxxxxxxxx>

* IISWC 2007 Call for Papers: 2007 IEEE International Symposium on Workload Characterization
  http://www.iiswc.org
  Submitted by Bhuvan Urgaonkar <bhuvan@xxxxxxxxxxx>

* Free HPCA Hardcopy distribution. Deadline March 1, 2007
  http://www.hpcaconf.org/
  Submitted by Josep Torrellas <torrellas@xxxxxxxxxxx>

* ACM TACO's 2007 Annual Call For Papers, Due March 9th
  http://www.acm.org/taco
  Submitted by Brad Calder <calder@xxxxxxxxxxx>

* Call for Papers: The 4th Workshop on Non-Silicon Computing 
  http://nsc4.ece.duke.edu
  Submitted by Chris Dwyer <dwyer@xxxxxxxxxxxx>

* IPDPS'07 Call for Participation: 21st IEEE International Parallel & Distributed Processing Symposium
  http://www.ipdps.org
  Submitted by Timothy M. Pinkston <tpink@xxxxxxx>

* Call for Nominations: 2007 Maurice Wilkes Award
  http://www.acm.org/sigs/sigarch/wilkes/wilkes.html?
  Submitted by Norm Jouppi <Norm.Jouppi@xxxxxx>

--Doug Burger
SIGARCH Information Director
infodir_SIGARCH@xxxxxxx

* Archive: http://lists.cs.wisc.edu/archive/sigarch-members/
* Web pages: http://www.cs.wisc.edu/~arch/www/, http://www.acm.org/sigarch/
* To remove yourself from the SIGARCH mailing list:
  mail listserv@xxxxxxx with message body: unsubscribe SIGARCH-MEMBERS

-----------------------------------------------------------------
Doug Burger			  Office:	       3.432 ACES
Associate Professor		  Phone:	     512-471-9795
Department of Computer Sciences	  Assistant:	     512-232-7460
The University of Texas at Austin Fax:		     512-232-1413
1 University Station, #C0500	  E-mail:   dburger@xxxxxxxxxxxxx
Austin, TX 78712-1188 USA	  www.cs.utexas.edu/users/dburger
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* SC07 Call for Papers: 20th International Conference for High-Performance
  Computing, Networking, Storage and Analysis

==============================================================
                   CALL FOR PAPERS
                        SC07 
    20th International Conference for High-Performance
       Computing, Networking, Storage and Analysis
            Reno, Nevada November 12-16, 2007 
             http://sc07.supercomputing.org/
         Sponsors: ACM SIGARCH/IEEE Computer Society 
==============================================================

SC07, the premier international conference on high-performance 
computing, networking, storage and analysis, provides a forum of 
the highest quality for scientists and engineers to present their 
latest research findings in one of most rapidly changing technical 
fields. We invite you to submit your work on all aspects of 
architecture, applications, performance, system software, networks, 
and grids. Topics of interest include, but are not limited to: 

- Multi-core performance 
- Reliability of large systems 
- Impact of technology on architecture 
- Power-efficient architectures and techniques 
- High-availability architectures 
- High-performance I/O systems 
- Embedded and reconfigurable architectures 
- Interconnect and network interface architectures 
- Network processor architectures 
- Innovative hardware/software trade-offs 
- Impact of compilers and OS on architecture 
- Performance evaluation and modeling of real machines 

A new two-part submission process is being used. Authors 
must submit an abstract by Friday, April 6, 2007. They must submit
the full version of the paper by Monday, April 9, 2007. No 
extensions will be granted. The full version should be a PDF file 
that does not exceed 20 pages according to the instructions on 
http://sc07.supercomputing.org. Papers that exceed the length 
limit or that cannot be viewed using Adobe Acrobat Reader (version 
3.0 or higher) may not be reviewed. Submissions for the Gordon 
Bell Prize will be handled the same way. Please indicate if the 
paper is a student paper for best student paper nominations. 
Papers will be evaluated based on their novelty, fundamental 
insights, and potential for long-term contribution. New-idea papers 
are encouraged. 

The submission site is http://www.sc-submissions.org/. 
Submission issues for papers should be directed to 
papers@xxxxxxxxxxxxxxxxxxxxxxxx 

Workshop, tutorial, panel session and other submissions are also 
solicited. See http://sc07.supercomputing.org. 

Important dates: 

- Abstracts due: April 6, 2007, 11pm EST 
- Papers due: April 9, 2007, 11pm EST 
- Workshop, panel, and tutorial proposals due: April 9, 2007, 11pm EST 
- Notification of acceptance: July 2, 2007 

Papers Committee Co-Chairs:

 Ricky Kendall, Oak Ridge National Lab 
 Josep Torrellas, University of Illinois 

Area Chairs: 

 Applications: Omar Ghattas, University of Texas 
 Architecture: John Carter, University of Utah
 Grids: Marty Humphrey, University of Virginia 
        Anne Trefethen, Oxford University 
 Networks: Craig Stunkel, IBM 
 Performance: Adolfy Hoisie, Los Alamos National Lab 
 System Software: Keshav Pingali, University of Texas 

Program Committee: 

APPLICATIONS: 
 Srinivas Aluru, Iowa State University 
 George Biros, University of Pennsylvania 
 Christian Bischof, University of Aachen 
 Rupak Biswas, NASA Ames 
 Brett Bode, DOE Ames Laboratory 
 Nikos Chrisochoides, College of William and Mary 
 Charbel Farhat, Stanford University 
 Stephen Jardin, Princeton Plasma Physics Lab 
 Kwan-Liu Ma, University of California Davis 
 Esmond Ng, Lawrence Berkeley National Lab 
 Michael Norman, University of California San Diego 
 David O'Hallaron, Carnegie Mellon University 
 Padma Raghavan, The Pennsylvania State University 
 Ulrich Ruede, University of Erlangen-Nuremberg 
 P. (Saday) Sadayappan, The Ohio State University 
 Gerhard Wellein, Regionales RechenZentrum Erlangen 
 Theresa Windus, Iowa State University 

ARCHITECTURE:
 Dennis Abts, Cray 
 Doug Burger, University of Texas 
 Derek Chiou, University of Texas 
 Mark Heinrich, University of Central Florida 
 Jose Martinez, Cornell University 
 Viktor Prasanna, University of Southern California 
 Alex Ramirez, Universitat Politècnica de Catalunya 
 Ashley Saulsbury, Sun Microsystems 
 Xiaowei Shen, IBM 
 Yan Solihin, North Carolina State University 
 Lixin Zhang, IBM 

GRIDS: 
 David Abramson, Monash University 
 Henrique Andrade, IBM 
 Henri Bal, Vrije Universiteit 
 Sujoy Basu, HP Labs 
 Franck Cappello, Inria 
 Ann Chervenak, USC Information Sciences Institute 
 Silvia Figueira, Santa Clara University 
 Wolfgang Gentzsch, D-Grid Initiative 
 Andrew Grimshaw, University of Virginia 
 Keith Jackson, Lawrence Berkeley National Lab 
 Dan Katz, Louisiana State University 
 Satoshi Matsuoka, Tokyo Institute of Technology 
 Philip Papadopoulos, San Diego Supercomputer Center 
 Manish Parashar, Rutgers University 
 Beth Plale, Indiana University 
 Rich Wolski, Univ. of California Santa Barbara 

NETWORKS:  
 Alan Benner, IBM 
 Darius Buntinas, Argonne National Lab 
 Mitch Gusat, IBM 
 Rami Melhem, University of Pittsburgh 
 Jarek Nieplocha, Pacific Northwest National Lab 
 Vivek Pai, Princeton University 
 Scott Pakin, Los Alamos National Lab 
 Dhabaleswar Panda, The Ohio State University 
 Fabrizio Petrini, Pacific Northwest National Lab 
 Steven Scott, Cray 
 Keith Underwood, Sandia National Laboratories 
 Pete Wyckoff, OSC 
 Dongyan Xu, Purdue University 

PERFORMANCE: 
 Bronis de Supinski, Lawrence Livermore National Lab 
 Vladimir Getov, University of Westminster 
 Lizy John, University of Texas 
 Karen Karavanic, Portland State University 
 Darren Kerbyson, Los Alamos National Lab 
 Barton Miller, University of Wisconsin 
 Bernd Mohr, Forschungszentrum Juelich 
 Leonid Oliker, Lawrence Berkeley National Lab 
 Allan Snavely, San Diego Supercomputer Center 
 Xian-He Sun, Illinois Institute of Technology 
 Jeffrey Vetter, Oak Ridge National Lab 
 Patrick Worley, Oak Ridge National Lab 

SYSTEM SOFTWARE:
 Greg Bronevetsky, Lawrence Livermore National Lab 
 Calin Cascaval, IBM 
 Rudolf Eigenmann, Purdue University 
 Guang Gao, University of Delaware 
 Mary Hall, USC Information Sciences Institute 
 Tony Hey, Microsoft 
 Laxmikant Kale, University of Illinois 
 Hironori Kasahara, Waseda University 
 Ken Kennedy, Rice University 
 Wei Li, Intel 
 Calvin Lin, University of Texas 
 Frank Mueller, North Carolina State University 
 David Padua, University of Illinois 
 Ram Rajamony, IBM 
 Lawrence Rauchwerger, Texas A&M University 
 Robert Wisniewski. IBM

----------------------------------------------------------------------
----------------------------------------------------------------------

* HOTCHIPS 19 Call for Papers: A Symposium on High-Performance Chips (HOTCHIPS - 2007)

A Symposium on High-Performance Chips - HOT CHIPS 19 - 
Stanford University, Palo Alto, California 
August 19-21, 2007(tentative)

AUTHOR'S SCHEDULE
Deadline for submissions: March 25, 2007
Notification of acceptance: April 30, 2007
Deadline for final version: July 13, 2007

AREAS OF INTEREST:

? Microprocessors			? Novel chips: quantum computing,
? Systems-on-chip			  nano-structures, micro-arrays
? Embedded processors			? Low-power chips/Dynamic power management
? Chipset chips				? Graphics/Multimedia/Game processors/
? Digital signal processors			  Display technology
? Application-specific processors	? Advanced semiconductor process technology
? Communication/networking chips	? Reconfigurable chips/processors
? Wireless LAN/Wireless WAN chips	? Operating system/chip interaction
? Network/security processors		? Advanced packaging technology
? Chips built from FPGAs		? Reliability and design for test
? Compiler technology			? Performance evaluation

AUTHOR INFORMATION AND FORMAT
Presentations at HOT Chips are in the form of 30-minute talks. Presentation slides will be 
published in the HOT Chips Proceedings. Participants are not required to submit written 
papers, but a select group will be invited to submit a paper for inclusion in a special 
issue of IEEE Micro. 

Submissions must consist of a title, extended abstract (two pages maximum.), and the 
presenter's contact information (name, affiliation, job title, address, phone(s), fax, 
and email). Please indicate whether you have submitted, intend to submit, or have already 
presented or published a similar or overlapping submissionto another conference or journal. Also indicate if you would like the submission to be held
confidential; we do our best to maintain confidentiality if requested.

Submissions should be in plain ASCII text, pasted into the message; do not submit .doc 
files, .txt files, MIME'd email, any attachments or other formats. Submissions containing 
figures may be submitted in pdf, but plain ASCII text is strongly preferred.

Submissions are evaluated by the Program Committee on the basis of performance of the 
device(s), degree of innovation, use of advanced technology, potential market significance,
and anticipated interest to the audience. Research and software contributions will be 
evaluated with similar criteria.

Please mail your submissions in plain ASCII text (in the message, not as an attachment!) by
March 25, 2007 to: submit2007@xxxxxxxxxxxx Authors will be notified as to acceptance by 
April 30, 2007. Send questions relating to the program to the program chairs at: 
program2007@xxxxxxxxxxxx and questions relating to conference operation or organization to 
the general chair, John Sell, at: info2007@xxxxxxxxxxxx .

Program Committee Co-Chairs:
John Mashey, Techviser
Raj Amirtharajah, UC Davis

Sponsored by the Technical Committee on Microprocessors and Microcomputers of the 
IEEE Computer Society.

Check the HOT CHIPS 19 web page for updates: http://www.hotchips.org

----------------------------------------------------------------------
----------------------------------------------------------------------

* IISWC 2007 Call for Papers: 2007 IEEE International Symposium on Workload Characterization

CALL FOR PAPERS - IISWC 2007

(Apologies in advance for multiple copies)

2007 IEEE International Symposium on Workload Characterization

        IISWC 2007
        September 2007,
        Boston, MA, USA

Web site: http://www.iiswc.org

This symposium is dedicated to the understanding and characterization of workloads which 
run on all types of computer systems. New applications and programming paradigms continue 
to emerge as the use of computers becomes more widespread and more sophisticated. Improving 
process and communication technology, innovations in microarchitectures compilers, and 
virtual machine technology are also changing the nature of problems that are being solved 
by computing systems. Whether they are PDAs, wireless and embedded systems at the low end 
or massively parallel systems at the high end, the design of tomorrow's computing machines 
can be significantly improved through the knowledge and ability to simulate the workload 
expected to run on them.

Important dates
---------------
        Abstract submission: March 12, 2007
        Paper submissions: March 19, 2007
        Acceptance Notification: May 28, 2007

Topics of Interest
------------------
Papers are solicited in all areas related to characterization of computing system workload. 
Topics of interest to participants in the symposium include (but are not limited to):

    * Characterization of applications in areas like
          o Search engines, E-commerce, Web server, Database, and
                Multi-tier applications
          o Embedded, Mobile, Multimedia, 3d-Graphics, Gaming,
                Telepresence
          o Life Sciences, Bio-informatics, Scientific Computing

    * Characterization of applications in areas like
          o Search engines, E-commerce, Web server, Database, and
                Multi-tier applications
          o Embedded, Mobile, Multimedia, 3d-Graphics, Gaming,
                Telepresence
          o Life Sciences, Bio-informatics, Scientific Computing
          o Security, Reliability, Biometrics
   
    * Characterization of OS, Virtual Machines, Middleware and Library
        Behavior
          o VMs, Websphere, .NET, Java VM, CLI
          o Graphics libraries, scientific libraries
   
    * Characterization of system behavior, including
          o Operating system and hypervisor effects
          o Effects due to virtualization and dynamic optimization
          o Failures, availability, and reliability
   
    * Implications of workload in design issues, such as
          o Processors, memory hierarchy, I/O, and networks
          o Hardware accelerators (GPGPU, XML, crypto, etc.)
          o Power management, reliability, security
   
    * Benchmark creation issues, including
          o Multithreaded benchmarks
          o Profiling, trace collection, synthetic traces
          o Validation of benchmarks

    * Abstract modeling of program behavior


COMMITTEES

General Chair
-------------
Mauricio Breternitz, Intel

Program Chairs
--------------
Anand Sivasubramaniam, Penn State University
David Christie, AMD

Benchmarks Chair
----------------
Lieven Eeckhout, Ghent University

Web and Publicity Chair
-----------------------
Bhuvan Urgaonkar, Penn State University

Program Committee
-----------------
Lieven Eeckhout, Ghent Univ.
Carole Dulong, Google
Michael Gshwind, IBM
Sudhanva Gurumurthi, Univ. of Virginia
Ravi Iyer, Intel
John Janakiraman, HP Labs
Kevin Lepak, AMD
Tao Li, Univ. of Florida
David Lilja, Univ. of Minnesotta
Gokan Memik, Northwestern Univ.
Chuck Moore, AMD
Ramesh Peri, Intel
Alma Riska, Seagate
Yan Solihin, NC State Univ.
Jeff Vetter, Oak Ridge
Murali Vilayannur, VMWare
Joshua Yi, Freescale

Steering Committee
------------------
Pradip Bose, IBM Research
Tom Conte, NC State University
Lieven Eeckhout, Ghent University
Jay Jayasimha, Intel
Lizy John, University of Texas at Austin
David Kaeli, Northeastern University
David Lilja, University of Minnesota
Ann Marie Maynard, IBM
Ravi Nair, IBM
John Shen, Nokia

----------------------------------------------------------------------
----------------------------------------------------------------------

* Free HPCA Hardcopy distribution. Deadline March 1, 2007

YEARLY DISTRIBUTION OF HARDCOPIES OF HPCA PROCEEDINGS
======================================================

Dear IEEE Computer Society Member with an interest in 
computer architecture:

We are revamping the Technical Committee on Computer 
Architecture (TCCA) by encouraging new members 
of the community to join and asking the existing
membership to update their accounts. 

Those who join or update their accounts by March 1, 2007 
can request a free hardcopy of this year's International 
Symposium on High Performance Computer Architecture (HPCA). 
We will repeat this same process every year.

* If you are not a TCCA member. Please become a TCCA member by
signing up at IEEE's TECA system (https://eckert.computer.org). 
See instructions below on how to do it. Enter your contact 
information, including physical mail address. Then, if desired, 
request a copy of this year's HPCA proceedings.

* If you are already a TCCA member. Please log into
IEEE's TECA system (https://eckert.computer.org) and get
into the TCCA View (see bottom of screen). Then, check that
your contact information is up to date (including physical 
mail address), renew your membership and, if desired, request 
a copy of this year's HPCA proceedings.

Please do so by March 1, 2007.

TCCA membership is free but has to be renewed every year.

Soft copies of the HPCA proceedings are as usual 
available at http://www.hpcaconf.org.

Questions? please send email to tccachair@xxxxxxxxxxxxx

Josep Torrellas, TCCA Chair
David Kaeli, TCCA Vice-Chair
Kevin Skadron, TCCA Publications Chair

Becoming a TCCA Member
=======================

Becoming a member of the IEEE Technical Committee on
Computer Architecture (TCCA) is free if you are an IEEE
member. Follow this process:

1. Go to IEEE's TECA system (https://eckert.computer.org)
   and create a web account if you do not already have one.
2. Once you have it, log in.
3. Check the TCCA box and press Update.
4. To see your TCCA benefits, you need to be in the TCCA View
   (see bottom of the screen). Your TCCA membership number 
   is your IEEE membership number. Your TCCA membership 
   needs to be renewed every year. If you have a problem, 
   please email teca@xxxxxxxxxxxx

Sponsored by the IEEE Computer Society TC on Computer
Architecture.

----------------------------------------------------------------------
----------------------------------------------------------------------

* ACM TACO's 2007 Annual Call For Papers, Due March 9th

ACM TACO's Annual Call For Papers
http://www.acm.org/taco



Submission Deadline  - March 9th, 2007, 11:00pm PST 

Author Notification  - May 28th, 2007



The ACM Transactions on Architecture and Code Optimization (TACO)
focuses on hardware, software, and system research spanning the fields
of computer architecture and code optimization. Articles that appear
in TACO present insights useful to architects, compiler writers, and
hardware or software developers.  It is the premier archival journal
targeted at research in computer architecture or compiler code
optimization.

Authors can submit papers to ACM TACO at any time for standard
review. In the standard review process we make every attempt possible
to have a first response three months after your submission.  This
will not change.

ACM TACO's annual call for papers will:

1. Guarantee a date of notification.  The author will find out by the
   notification date if the paper is classified as accept, accept with
   minor revisions, needs major revision, or is rejected.  Papers
   requiring revisions will be resubmitted after changes are made to
   address the comments for an accelerated review.

2. Guarantee publication within 1/2 year of notification, if the
   outcome is an accept or accept with minor revision, and the
   revisions are done in a timely manner.

3. Attract new unpublished work.  A paper accepted with minor
   revision during one of these review periods will appear in
   publication less than a year from date of submission.  This makes it
   even more attractive to submit and publish new research in ACM TACO,
   while maintaining the advantages of a more iterative submission and
   review process than is found in conference submissions.



For full details see:  

http://www.acm.org/taco

Co-Editors-in-Chief 
.  Brad Calder, UCSD and Microsoft (calder@xxxxxxxxxxx) 
.  Dean Tullsen, UCSD (tullsen@xxxxxxxxxxx) 

Associate Editors

.  Sarita Adve, UIUC 
.  David Albonesi, Cornell 
.  David August, Princeton 
.  Fred Chong, UC Santa Barbara 
.  Tom Conte, NCSU 
.  Jack Davidson, U. Virginia 
.  Kemal Ebcioglu, Global Supercomputing
.  Antonio Gonzalez, UPC & Intel
.  Rajiv Gupta, U. Arizona 
.  Michael Hind, IBM 
.  Wen-Mei Hwu, UIUC 
.  Steve Keckler, U. Texas, Austin 
.  Scott Mahlke, U. Michigan 
.  Margaret Martonosi, Princeton 
.  John Shen, Intel 
.  David Wood, U. Wisconsin 

----------------------------------------------------------------------
----------------------------------------------------------------------

* Call for Papers: The 4th Workshop on Non-Silicon Computing

The 4th Workshop on Non-Silicon Computing (http://nsc4.ece.duke.edu)
Held in conjunction with the FCRC 2007 and
The 34th International Symposium on Computer Architecture (ISCA 2007)

NSC-4 is the fourth in a series of workshops exploring the issues involved
in creating computing systems out of devices other than silicon-based
transistors. This fourth installment of the workshop series follows NSC-1
held in conjunction with HPCA-8 in 2002, NSC-2 held at ISCA-30 in 2003, and
NSC-3 held at ISCA-31 in 2004.

The success of computing over the past thrity-five years is based in large
part on advances in the fabrication of CMOS-based integrated circuits, and
both engineers and consumers have come to expect and plan for exponential
increases in system performance over time.

However, a number of physical and economic factors have already begun to
curtail the continued scaling of CMOS-based designs. Thus, the academic
community has engaged in research that investigates computing systems based
on other technologies. An important goal of this research is not to simply
supplant traditional CMOS but to reach beyond conventional modes of
computation and develop new application domains for computer systems.

This workshop will focus on innovation in the circuits, architectures,
compilers, and programming models necessary to exploit emerging technologies
for computation and those systems that expand the computing domain.

Please visit http://nsc4.ece.duke.edu for more details!

***********************************
Important Dates
***********************************
 May 7  Paper submission deadline
 May 15 Author notification
 May 18 Camera-ready paper deadline
 June 9 (all-day) Workshop at ISCA
***********************************
http://nsc4.ece.duke.edu

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----------------------------------------------------------------------

* IPDPS'07 Call for Participation: 21st IEEE International Parallel & Distributed
  Processing Symposium

===================================================================
21st IEEE International Parallel & Distributed Processing Symposium
===================================================================
Monday, 26th March - Friday, 30th March 2007
Renaissance Long Beach Hotel
Long Beach, California USA

Sponsored by IEEE Computer Society Technical Committee on Parallel
Processing
===================================================================
Go to www.ipdps.org and
...Register for IPDPS'07 on-line by March 5th for advanced registration.  
...Link to the Renaissance Hotel and register by March 2nd to obtain  
   guaranteed special rates for IPDPS 2007 attendees.
===================================================================

This announcement contains the following four sections:

I.   IPDPS 2007 SUMMARY PROGRAM SCHEDULE
II.  WORKSHOPS (Mon & Fri)
III. INVITATION FOR COMMERCIAL PARTICIPATION
IV.  IPDPS 2007 LOCATION

--------------------------------------------------
I. SUMMARY PROGRAM SCHEDULE
--------------------------------------------------
A total of 109 papers have been selected for presentation in 27 technical
sessions and a plenary session for best papers.  All IPDPS 2007 events,
including workshops, the symposium tutorial,  and banquet, are included in
registration fees and all events are open to all attendees.  A copy of
proceedings which includes the 21 workshops will be distributed at
registration.  Advance discounted registration fees are available through
March 5th, 2007.  On site fees will apply after that.  (Check Web at
www.ipdps.org for updates and to register online.)

Monday - March 26, 2007
---------------------------------
-WORKSHOPS 1-12 (all day)
 Visit IPDPS Web to link to individual workshop program & schedule

-TCPP RECEPTION & TALK (evening)

Tuesday - March 27, 2007
-----------------------------------
-KEYNOTE PLENARY SESSION (8:00 AM)
  Christopher Johnson, University of Utah 
  "Large-Scale Bioimaging and Visualization"

-TECHNICAL SESSIONS 1-4 (morning) 
Session 1: Peer-to-Peer Algorithms
Session 2: Science, Finance, and Combinatorial Applications
Session 3: Cluster and Server Architectures
Session 4: Software Support for Large Scale Scientific Computing

-TECHNICAL SESSIONS 5-8 (early afternoon)
Session 5: Scheduling Algorithms
Session 6: Search, Text and Web Applications
Session 7: Processor Architecture
Session 8: Performance Analysis and Optimization

-TECHNICAL SESSIONS 9-12 (late afternoon)
Session 9: Complexity of Algorithms
Session 10: Power and Energy Aware Computing
Session 11: Performance Modeling and Evaluation
Session 12: Middleware and Tools

-SYMPOSIUM TUTORIAL (evening)
  "High-performance Computing Methods for Computational Genomics" 

Wednesday - March 28, 2007
---------------------------------------
-KEYNOTE PLENARY SESSION (8:00 AM)
  Michael J. Flynn, Stanford University 
  "Avoiding the Memory Bottleneck through Structured Arrays"

-BEST PAPERS SESSION (morning)

-TECHNICAL SESSIONS 13-16 (early afternoon)
Session 13: Wireless, Adhoc and Sensor Algorithms
Session 14: Applications on Emerging Architectures
Session 15: Interconnection Networks
Session 16: Performance Prediction and Distributed Systems

-SYMPOSIUM PANEL (late afternoon)
  "Is the Multi-Core Roadmap going to Live Up to its Promises?"
  Moderator:  Per Stenstrom (Chalmers University of Technology, Sweden)
  Panelists: Michel Dubois (USC); Tim Mattson (Intel); Kunle Olukotun
(Stanford); 
  David Padua  (UIUC); Marc Tremblay (Sun Microsystems)

-SYMPOSIUM BANQUET (evening)
  Speaker: Mark Seager, Lawrence Livermore National Labs 
  "Why Peta-Scale is Different: An Ecosystem Approach to Predictive
Scientific 
  and Engineering Simulation"

Thursday - March 29, 2007
------------------------------------
-KEYNOTE PLENARY SESSION (8:00 AM)
  Umesh Vazirani, University of California Berkeley 
  "Quantum Physics and the Nature of Computing"

-TECHNICAL SESSIONS 17-20 (morning)
Session 17: Network Algorithms
Session 18: Peer-to-Peer Systems and Applications I
Session 19: Networks and Storage Systems
Session 20: Compiler Optimization and Software Environment

-TECHNICAL SESSIONS 21-24 (early afternoon)
Session 21: Distributed Algorithms
Session 22: Peer-to-Peer Systems and Applications II
Session 23: Job Scheduling
Session 24: Fault Tolerance and Checkpointing

-TECHNICAL SESSIONS 25-27 (late afternoon)
Session 25: Load Balancing Algorithms
Session 26: Distributed and Mobile Applications
Session 27: Algorithms for Parallel Execution Parallel
COMMERCIAL TRACK

Friday - March 30, 2007
---------------------------------
-WORKSHOPS 13-21 (all day)
 Visit IPDPS Web to link to individual workshop program & schedule

---------------------------------------
II. WORKSHOPS (Mon & Fri)
---------------------------------------
1 HCW
Heterogeneity in Computing Workshop
2 WPDRTS
Workshop on Parallel and Distributed Real-Time Systems
3 RAW
Reconfigurable Architectures Workshop
4 HIPS-ToPMoDRS
Workshop on High-Level Parallel Programming Models & Supportive Environments
5 JAVAPDC
International Workshop on Java and Components for Parallelism, Distribution
and Concurrency
6 NIDISC
Workshop on Nature Inspired Distributed Computing
7 HiCOMB
Workshop on High Performance Computational Biology
8 APDCM
Advances in Parallel and Distributed Computing Models
9 CAC
Communication Architecture for Clusters
10 NSFNGS
NSF Next Generation Software Program
11 HPPAC
High-Performance, Power-Aware Computing
12 HPGC
High Performance Grid Computing
13 PDSEC
Workshop on Parallel and Distributed Scientific and Engineering Computing
14 PMEO-PDS
Performance Modelling, Evaluation, and Optimisation of Parallel and
Distributed Systems
15 DPDNS
Dependable Parallel, Distributed and Network-Centric Systems
16 SSN
International Workshop on Security in Systems and Networks
17 SMTPS
Workshop on System Management Techniques, Processes, and Services
18 POHLL
Performance Optimization for High-Level Languages and Libraries
19 HOTP2P
Third International Workshop on Hot Topics in Peer-to-Peer Systems
20 PCGRID
Workshop on Large-Scale, Volatile Desktop Grids
21 MTAAP
Workshop on Multi-Threaded Architectures and Applications

-----------------------------------------------------------------------
III.  INVITATION FOR COMMERCIAL PARTICIPATION
-----------------------------------------------------------------------
The call for Commercial Participation at IPDPS 2007 remains open, and
companies are invited to contact the Commercial Co-chairs to explore
sponsorship and participation, including: 
(1) Give a presentation in a special Commercial Track, which includes
publication of a technical article in the proceedings of the symposium. 
(2) Offer an evening Commercial Tutorial to provide orientation and training
to symposium participants interested in using and/or learning more about
your technology. 
(3) Participate in Commercial Exhibits by having a booth where your company
can promote awareness about its recent technological advances in a
"walk-up-and-talk" setting. 

IPDPS is one of the premier international conferences in the areas of
parallel and distributed computing and includes an academic and industrial
audience from all over the world. The Symposium is also known for a large
number of high-quality workshops in diverse areas. In its 21st year, IPDPS
returns to Southern California where it started and is an excellent
opportunity for local companies to showcase their technologies to a
sophisticated international audience. For more information, send email to
Deborah.Nielsen@xxxxxxxxxxxx

-------------------------------------
V.   IPDPS 2007 LOCATION
-------------------------------------
In March of 2007, IPDPS returns to Southern California, its starting point.
The meeting place is the Renaissance Long Beach Hotel, which overlooks the
Queen Mary and Aquarium of the Pacific and is situated just steps from
trendy dining, sandy beach, and boutique shopping.  Go to the IPDPS Web at
www.ipdps.org and link to the Renaissance Hotel to register by March 2nd to
obtain guaranteed special rates.  

Attractions like Disneyland, Universal Studios, and the Getty Museum &
Center are a short drive from Long Beach, and the region north and south of
Long Beach - known as the Tech Coast - is home to USC, UCLA, UCI, and UCSD.
It is an international setting with village like beach communities and the
attractions and resources of Los Angeles, Orange County and San Diego.  Join
us to commemorate 21 years of building the IPDPS event and community of
computer scientists who meet annually to extend knowledge and understanding
in this field.

PLEASE JOIN US IN LONG BEACH, CALIFORNIA DURING THE LAST WEEK OF MARCH!

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* Call for Nominations: 2007 Maurice Wilkes Award

 The Maurice Wilkes Award
Citation:
The award of $2,500 is given annually for an outstanding contribution to computer 
architecture made by an individual whose computer-related professional career (graduate 
school or full-time employment, whichever began first) started no earlier than January 1st 
of the year that is 20 years prior to the time of nomination.

The award is presented annually at the International Symposium on Computer Architecture 
Awards Banquet.

Selection Process:
The recipient of the Maurice Wilkes Award is selected by a vote of the SIGARCH Executive 
Committee and Board from a list of nominees submitted by the SIGARCH Awards Committee.

The SIGARCH Awards Committee consists of three members. Each member of the committee is 
selected by the Chair of SIGARCH to serve a three year term, with one new member added to 
the committee each year. Each committee member will serve as the Chair of the Awards 
Committee during their second year on the committee. Each year at least one member of the 
Awards Committee should be a member of the SIGARCH Executive Committee or Board, and at 
least one member should not be a member of the SIGARCH Executive Committee or Board. The 
Awards Committee should nominate from one to three candidates for selection by the SIGARCH 
Executive Committee and Board. The Awards Committee should transmit supporting materials 
for its nominees, along with a ranking of the nominees if appropriate, to the SIGARCH Chair. 
When a winner is selected the SIGARCH Chair and the Awards Committee Chair will choose a 
citation for the Award.

Nominations should consist of:

   1. Name, address, and phone number of person making the nomination.
   2. Name and address of candidate for whom an award is recommended.
   3. A statement (between 200 and 500 words long) as to why the candidate deserves the 
      award.
   4. The name(s) and address(es) or telephone number(s) of others who agree with the 
      recommendation. Supporting letters from such persons are useful. 

Selection Milestones:

Each year the SIGARCH Chair should appoint the new member of the Awards Committee by 
December 15th, and should prepare by that date a Call for Nominations, which includes the 
award citation and the Award Committee's contact information, for paper and electronic 
distribution. The Call should be mailed to appropriate mailing lists, printed in the first 
issue of Computer Architecture News following the 15th of December, and made available to 
any computer architecture conferences that occur before the nomination deadline.

The nomination deadline should be set for at least 8 weeks before the start of the award 
ear's ISCA conference. The Awards Committee should take no more than three weeks after the 
deadline to select their nominees. The SIGARCH Executive Committee and Board should take no 
more than a week from the delivery of nominations from the Awards Committee to make their 
selection. After a citation is determined, no less than four weeks from the start of the 
ISCA conference, the SIGARCH Chair will inform the winner, and inform ACM Headquarters of 
the decision so that a plaque can be ordered and a check drawn in time for delivery to the 
ISCA conference.

Past Winners:
# 2006 - Doug Burger
# 2005 - Steve Scott
# 2004 - Kourosh Gharachorloo
# 2003 - Dirk Meyer
# 2002 - Glenn Hinton
# 2001 - Anant Agarwal
# 2000 - William J. Dally
# 1999 - Gurindar S. Sohi
# 1998 - Wen-mei Hwu

Current Awards Committee:

Uri C. Weiser, Chair
EE department, Technion IIT
Haifa 32000, Israel
also: Commex-Technologies
24 Raoul Wallenberg
Tel Aviv 69719, Israel       
uri.weiser@xxxxxxxxxxxxxxxxx

Mary Jane Irwin
Dept. of Computer Science & Engineering
Pennsylvania State University
348C Information Sciences and Technology Building      
University Park, PA 16802 USA 
mji@xxxxxxxxxxx 

Bill Dally 
Computer Systems Lab  
Stanford University 
Gates Room 301 
billd@xxxxxxxxxxxxxxxx 

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