This is the 1st April 2007 Digest of SIGARCH Messages (sigarch-apr07a):
* HPCA 2008 Call for Papers
http://www.cs.utah.edu/hpca08
Submitted by Liqun Cheng <legion@xxxxxxxxxxx>
* PACT '07 Call for Papers -- Paper Submission Deadline Update
http://pactconf.org
Submitted by Sylvius Rus <rus@xxxxxxxxxx>
* Call for Participation: SELSE 3 - the 2007 IEEE Workshop on Silicon Errors in Logic - System Effects
http://www.selse.org
Submitted by Cristian Constantinescu <cristian.constantinescu@xxxxxxx>
* Call for Papers: Workshop on Computer Architecture Education
http://www4.ncsu.edu/~efg/wcae2007.html
Submitted by Ed Gehringer <efg@xxxxxxxx>
--Doug Burger
SIGARCH Information Director
infodir_SIGARCH@xxxxxxx
* Archive: http://lists.cs.wisc.edu/archive/sigarch-members/
* Web pages: http://www.cs.wisc.edu/~arch/www/,
http://www.acm.org/sigarch/
* To remove yourself from the SIGARCH mailing list:
mail listserv@xxxxxxx with message body: unsubscribe SIGARCH-MEMBERS
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Doug Burger Office:
3.432 ACES
Associate Professor Phone: 512-471-9795
Department of Computer Sciences Assistant: 512-232-7460
The University of Texas at Austin Fax: 512-232-1413
1 University Station, #C0500 E-mail: dburger@xxxxxxxxxxxxx
Austin, TX 78712-1188 USA www.cs.utexas.edu/users/dburger
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* HPCA 2008 Call for Papers
The 14th International Symposium on High-Performance Computer Architecture (HPCA08)
Salt Lake City, UT February 16-20, 2008 (co-located with PPoPP-13)
http://www.cs.utah.edu/hpca08
Abstracts due: Aug. 7th, 2007 at 1PM EST (USA)
Submission due: Aug. 14th, 2007 at 1PM EST (USA)
Conference Information
The International Symposium on High-Performance Computer Architecture is a premier forum for scientists and engineers to present their latest research findings in this rapidly-changing field. Authors are invited to submit papers on all aspects of high-performance computer architecture. Topics of interest include, but are not limited to:
* Processor architectures
* Cache and memory systems
* Parallel computer architectures
* Impact of technology on architecture
* Power-efficient architectures and techniques
* Dependable architectures
* High-performance I/O systems
* Embedded and reconfigurable architectures
* Special purpose processors and accelerators
* Interconnect and network interface architectures
* Network processor architectures
* Innovative hardware/software trade-offs
* Impact of compilers and operating systems on architecture
* Performance modeling and evaluation
Authors should submit an abstract before Tuesday, August 7, 2007, 1pm EST. They should submit the full version of the paper before Tuesday, August 14, 2007, 1pm EST. No extensions will be granted. The full version should be a PDF file that does not exceed 6,000 words according to the instructions in http://www.hpcaconf.org/hpca14. Papers that exceed the length limit or that cannot be viewed using Adobe Acrobat Reader (version 3.0 or higher) may not be reviewed. Papers should be submitted for blind review. Please contact the program chair at antonio.gonzalez@xxxxxxxxx for any submission issues. Please indicate whether the paper is a student paper for best student paper nominations.
HPCA will host an Industrial Paper Session presenting novel insights from industry. Its separate Call for Papers can be found at http://www.hpcaconfg.org. Papers will be evaluated based on their novelty, fundamental insights, and potential for long-term contribution. New-idea papers are encouraged.
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* PACT '07 Call for Papers -- Paper Submission Deadline Update
CALL FOR PAPERS
PACT '07
16th International Conference on Parallel Architectures and Compilation Techniques
Brasov, Romania, September 15-19, 2007
http://pactconf.org
Sponsors: IEEE Computer Society/ACM SIGARCH/IFIP
==============================================================
The submission site is http://pactconf.org. Manuscripts should be submitted for blind review.
Submission issues for papers should be directed to rwerger@xxxxxxxxxxxx Workshop submissions are also solicited.
Important dates:
- Abstracts due: April 6, 2007, 11pm CST
- Papers due: April 13, 2007, 11pm CST
- Workshop proposals due: April 13, 2007, 11pm CST
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The purpose of PACT is to bring together researchers from architecture,
compilers, applications and languages to present and discuss innovative
research of common interest. PACT solicits novel papers on a broad range
of topics that include, but are not limited to:
- Parallel architectures and computational models
- Compilers and tools for parallel computer systems
- Multicore, multithreaded, superscalar, and VLIW architectures
- Compiler/hardware support for hiding memory latencies
- Support for correctness in hardware and software (esp. with
concurrency)
- Reconfigurable computing
- Dynamic translation and optimization
- I/O issues in parallel computing and their relation to applications
- Parallel programming languages, algorithms and applications
- Middleware and run time system support for parallel computing
- High performance application specific systems
- Applications and experimental systems studies
- Non-traditional computing systems topics
Abstract submissions are due April 6, 2007 and paper submissions are
due April 13, 2007. No extensions will be granted. Detailed instructions for
electronic submission and other important dates will be posted on the
PACT conference web site (http://pactconf.org) For
additional information regarding paper submissions, please contact the
Program Chair, Lawrence Rauchwerger (rwerger@xxxxxxxxxxx).
Proposals are solicited for tutorials and workshops to be held immediately
before the conference. Interested individuals are invited to submit
proposals to the Workshops Chair, Guang Gao (ggao@xxxxxxxxxxxxxx)
and the Tutorials Chair, Avi Mendelson (avi.mendelson@xxxxxxxxx).
PACT '07 will take place in Romania, the newest member of the European
Union. Romania is a mixture of 21st century technology, ancient culture,
and unspoiled nature. It is easily reached by numerous daily non-stop
flights from all European capitals. Brasov, our host city, is the largest of
the seven Saxon cities of the Transylvania province. Nearby attractions
include Dracula's Castle, the royal summer palace, the capital city of
Bucharest, and Sibiu, the 2007 European Capital of Culture.
PACT '07 is dedicated to the memory of Irina Athanasiu.
Irina was a computer science professor at the Politehnica University, Bucharest.
She taught, mentored and advised generations of Romanian computer scientists
who have achieved prominent positions in academia and industry throughout the
world. She dedicated her life to her students and our profession.
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General Chair
Marc Snir, UIUC
Program Chair
Lawrence Rauchwerger, Texas A&M University
Local Arrangements Chairs
Nicolae Tapus, Politehnica Bucharest
George Toacse, Transilvania University
Publicity Chairs
Americas: Silvius Rus, Google
Asia/Pacific: Manish Gupta, IBM India
Europe: Francois Bodin, IRISA
Publication Chair
David Bernstein, IBM Israel
Registration Chair
Emil Slusanschi, Politehnica Bucharest
Tutorials Chair
Avi Mendelson, Intel Israel
Workshops Chair
Guang Gao, University of Delaware
Finance Chair
Calin Cascaval, IBM USA
Web Chair
Nancy Amato, Texas A&M University
Steering Committee
Jean Luc Gaudiot (Chair), UC Irvine
Erik Altman, IBM USA
Michel Cosnard, INRIA
Kemal Ebcioglu, Global Supercomputing
Kathryn McKinley, UT Austin
Gabby Silberman, Computer Associates
Kevin Skadron, University of Virginia
Josep Torrellas, UIUC
Ben Zorn, Microsoft
Program Committee
Bilha Mendelson, IBM Israel
David Callahan, Microsoft
Albert Cohen, INRIA
James Cownie, Intel USA
James Dehnert, Google
Michel Dubois, USC
Thomas Gross, ETH Zurich
Michael Gschwind, IBM USA
Maurice Herlihy, Brown University
Michael Huang, University of Rochester
Wen-mei Hwu, UIUC
Ravishankar Iyer, Intel USA
Christos Kozyrakis, Stanford University
Jens Knoop, TU Vienna
Jaejin Lee, Seoul National University
Jose F. Martinez, Cornell U
Margaret Martonosi, Princeton University
Sam Midkiff, Purdue University
Jose Moreira, IBM USA
Alex Nicolau, UC Irvine
Michael O'Boyle, University of Edinburgh
Andrea Pietracaprina, University of Padova
David Padua, UIUC
Keshav Pingali, UT Austin
Andr? Seznec, IRISA
Per Stenstr?m, Chalmers UT
Stamatis Vassiliadis, TU Delft
Mateo Valero, UPC Barcelona
Alex Veidenbaum, UC Irvine
Pen-Chung Yew, University of Minnesota
Hao Yu, IBM USA
Hans Zima, University of Vienna & JPL
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* Call for Participation: SELSE 3 - the 2007 IEEE Workshop on Silicon Errors in Logic - System Effects
Please join us on April 3 & 4 at the University of Texas at Austin for SELSE 3 - the 2007 IEEE Workshop on Silicon Errors
in Logic - System Effects. SELSE provides a forum for participants from industry and academia to discuss both current
research and practices in system-level error management and future technology and research directions. This year, we have
expanded the scope of SELSE to include more types of errors in silicon, in addition to soft errors in logic. The program is
available at www.selse.org. We think that you will find the program exciting, and as in the previous two years, we expect a
high level of audience participation that will spark memorable discussions and reach conclusions to help set directions for
our colleagues in both academia and industry. We ask that you register in advance if possible so that we can get an accurate
head count and be prepared for your arrival.
The on-line registration for SELSE III is now operational. The deadline for advance on-line registration has been extended
to March 26. We encourage you to register on-line to get the lower rate of $200 for IEEE members, $250 for nonmembers, and
$35 for student IEEE members.
We have blocked rooms at the Austin Omni Hotel.
700 San Jacinto at 8th St, Austin, TX 78701
Tel: 512-476-3700
Mention "IEEE Computer" group to get the $149 rate. The rooms will be held at this rate until next Thursday, March 29.
Also, the following RSVP information would be helpful in planning. Please respond to sanda@xxxxxxxxxxx
Please confirm your attendance for:
Day 1 sessions
Day 1 reception and banquet
Day 2 sessions
Continental breakfast, lunches, and the banquet are included.
If attending the banquet, please indicate your meal preference:
Chicken with Crab & Crimini Mushroom Sauce
Roasted Vegetable Crepes with Boursin Cheese
Tea Crusted Salmon
We look forward to seeing you soon in Austin!
Pia Sanda, Wendy Bartlett, General Co-Chairs
and the SELSE 3 committee
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* Call for Papers: Workshop on Computer Architecture Education
Workshop on Computer Architecture Education
Held in conjunction with the
34th International Symposium on Computer Architecture
San Diego, CA
Saturday, June 9, 2007
http://www4.ncsu.edu/~efg/wcae2007.html
Theme
WCAE provides the premier forum for educators in computer architecture
to discuss and share their experiences and teaching philosophy. Over
190 papers on computer architecture education have been presented at
the workshop since its inception in 1995. The goal is for participants
to come away from the workshop with new ideas on delivering courses in
computer architecture. Topics of interest include, but are not limited
to, the following.
Topics of interest
New approaches to introductory courses
Advanced courses
Development of materials for active learning
Laboratory support for distance education
Textbook development
Textbook selection
Critical evaluation of textbook approaches
Integration of research into teaching
Industrial support for teaching
Interdepartmental issues (CS/ECE)
National differences in curricula
Hardware tools
Simulators and other software tools
Prototyping
Visualization aids
VLSI design packages
Architectural issues specific to embedded systems
Software issues specific to embedded systems
Industrial needs regarding embedded systems education
Encouraging students to do research
Encouraging students to pursue the Ph.D.
For an idea of what we have published in the past, see the WCAE
archive, http://www.ncsu.edu/wcae/, made possible with funding from
the SIGCSE Special Projects fund.
Submission of contributions
Interested authors should submit a full paper (not to exceed 8 pages),
following the formatting instructions given in the files in
ftp://pubftp.computer.org/Press/Outgoing/proceedings/8.5x11%20-%20Formatting%20\
files/
Organizer
Edward F. Gehringer
e-mail: efg@xxxxxxxx
Center for Efficient, Secure and Reliable Computing
Dept. of Electrical and Computer Engineering
Department of Computer Science
North Carolina State University
Box 7256
Raleigh, NC 27695-7256
+1 919 515-2066
Important Dates
Submission Due Date: Monday, April 30, 2007
Author Notification: Friday, May 11, 2007
Final Paper Due Date: Friday, May 18, 2007
Copies of papers presented at the workshop will be made available at the workshop, and in archival form on the Web.
Program Committee
Aleksandr Milenkovic, University of Alabama at Huntsville
Anujan Varma, University of California at Santa Cruz
Chris Vickery, City University of New York
Craig Zilles, University of Illinois
Dan Connors, University of Colorado
David Kaeli, Northeastern University
Diana Franklin, Cal Poly-San Luis Obispo
Eduardo Sanchez, Ecole Polytechnique Federale, Lausanne
James Conrad, University of North Carolina at Charlotte
Joerg Keller, Fernuniversitaet Hagen
Joao Cardoso, INESC-ID, Lisbon
Manish Vachhajarani, University of Colorado
Mark Fienup, University of Northern Iowa
Mats Brorsson, KTH Royal Institute of Technology, Stockholm
Michael Manzke, Trinity College, Dublin
Antonio Prete, Universit? di Pisa
Mitch Thornton, Southern Methodist University
Richard Enbody, Michigan State University
Subramanian Ganesan, Oakland University
Tim Stanley, Brigham Young University-Hawaii
Wayne Wolf, Princeton University
Yale Patt, University of Texas at Austin
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