This is the 3rd July 2007 Digest of SIGARCH Messages (sigarch-jul07c):
* HPCA 2008 Call for Papers: 14th International Symposium on High-Performance
Computer Architecture
http://www.cs.utah.edu/hpca08/
Submitted by Liqun Cheng <legion@xxxxxxxxxxx>
* ISCA 2008 Call for Papers: The 35th Annual International Symposium on Computer Architecture
http://isca2008.cs.princeton.edu
Submitted by Qin Lv <qlv@xxxxxxxxxxxxxxxx>
* PMUP 2008 Call for Papers: 2nd Workshop on Programming Models for Ubiquitous Parallelism
http://www.ece.purdue.edu/~pmup2007/
Submitted by Vijay Pai <vpai@xxxxxxxxxx>
--Doug Burger
SIGARCH Information Director
infodir_SIGARCH@xxxxxxx
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Doug Burger Office: 3.432 ACES
Associate Professor Phone: 512-471-9795
Department of Computer Sciences Assistant: 512-232-7460
The University of Texas at Austin Fax: 512-232-1413
1 University Station, #C0500 E-mail: dburger@xxxxxxxxxxxxx
Austin, TX 78712-1188 USA www.cs.utexas.edu/users/dburger
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* HPCA 2008 Call for Papers: 14th International Symposium on High-Performance
Computer Architecture
HPCA-08 Call for Papers
14th International Symposium on High-Performance Computer Architecture
Salt Lake City, Feb. 16-20, 2008, (collocated with PPoPP?08)
http://www.cs.utah.edu/hpca08/
Submissions of Abstracts: Aug. 7th, 2007 at 1PM EST
Submissions of Full Papers: Aug. 14th, 2007 at 1PM EST
Notifications for Technical Paper: October 27, 2007
The International Symposium on High-Performance Computer Architecture is a premier
forum for scientists and engineers to present their latest research findings in this
rapidly-changing field. Authors are invited to submit papers on all aspects of high-
performance computer architecture. Topics of interest include, but are not limited to:
* Processor architectures
* Cache and memory systems
* Parallel computer architectures
* Impact of technology on architecture
* Power-efficient architectures and techniques
* Dependable architectures
* High-performance I/O systems
* Embedded and reconfigurable architectures
* Special purpose processors and accelerators
* Interconnect and network interface architectures
* Network processor architectures
* Innovative hardware/software trade-offs
* Impact of compilers and operating systems on architecture
* Performance modeling and evaluation
Authors should submit an abstract before Tuesday, August 7, 2007, 1pm EST. They should
submit the full version of the paper before Tuesday, August 14, 2007, 1pm EST.
No extensions will be granted. The full version should be a PDF file that does not exceed
6,000 words according to the instructions in http://www.cs.utah.edu/hpca08/. Papers that
exceed the length limit or that cannot be viewed using Adobe Acrobat Reader (version 3.0
or higher) may not be reviewed. Papers should be submitted for blind review. Please
contact the program chair at antonio.gonzalez@xxxxxxxxx for any submission issues. Please
indicate whether the paper is a student paper for best student paper nominations.
HPCA will host an Industrial Paper Session presenting novel insights from industry. Its
separate Call for Papers can be found at http://www.cs.utah.edu/hpca08/. Papers will be
evaluated based on their novelty, fundamental insights, and potential for long-term
contribution. New-idea papers are encouraged.
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* ISCA 2008 Call for Papers: The 35th Annual International Symposium
on Computer Architecture
ISCA 2008
The 35th Annual International Symposium
on Computer Architecture
June 21-25, 2008 Beijing, China
http://isca2008.cs.princeton.edu
Call for Papers
The International Symposium Computer Architecture is the premier forum for discussing new
ideas and experimental experiences in computer architecture. This year's conference will
be held in Beijing, China, where technical discussions will mix with rich culture and
history. Novel papers are solicited on a broad range of topics, including,
but not limited to:
* Processor architectures
* Multiprocessor and chip multiprocessor architectures
* Memory systems
* Storage subsystems
* Interconnection Networks
* Hardware support for parallel programming
* Hardware support for debugging and program correctness
* Hardware support for reliability and fault tolerance
* Hardware support for security
* Hardware support for virtual machines
* Instruction level, thread level, and data level parallelism
* Power and energy efficient architectures
* Application specific, reconfigurable, and embedded architectures
* Network processor and router architectures
* Architectures for emerging technologies and applications
* Impact of technology on architecture
* Architecture modeling and simulation methodology
* Performance evaluation and measurement of real systems
IMPORTANT DATES
Abstract Deadline: Nov 9th, 2007
Final Paper Deadline: Nov 19th, 2007 (*)
Conference: Jun 21-25, 2008
(*) The final paper deadline already includes a 3-day automatic extension. NO FURTHER
EXTENSIONS WILL BE GIVEN.
For more information on the conference and submission instructions, please visit the
conference website:
http://isca2008.cs.princeton.edu
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* PMUP 2008 Call for Papers: 2nd Workshop on Programming Models for Ubiquitous Parallelism
2nd Workshop on Programming Models for Ubiquitous Parallelism
http://www.ece.purdue.edu/~pmup2007/
Sept. 15, 2007, Brasov, Romania
(co-located with PACT'07)
The widespread adoption of multi-core processors by all of the major chip manufacturers
is making the promise of ubiquitous parallelism a reality. However, it also requires the
research community to deliver solutions on how to program a wide variety of applications
(general-purpose, special-purpose, and HPC) in a way that exploits the capabilities of
multi-core chips. The programmability of these systems by "ordinary" programmers is one
of the most important problems facing global hardware and software industries.
This workshop seeks research innovations for languages, libraries, models of concurrency,
and tools that target the growing number of parallel cores on modern processors.
Topics of interest include, but are not limited to:
* Parallel programming languages and programming constructs for
multi-core processors
* New programming paradigms for parallel computing
* Runtime systems for parallelism
* Hardware support for advanced parallel programming
* Libraries, toolkits, and encapsulation of parallelism
* Ways of expressing parallelism (e.g., declarative languages,libraries)
* Parallelism across different layers (e.g., application, library, OS, memory,
I/O devices)
* Programming models for embedded systems and SoC's
* Programming models for non-traditional parallel environments
* Impact of parallelism on pedagogy
In order to encourage authors to submit their latest and best work, submissions will
be limited to a four page extended abstract (using ACM-style formatting), which will
be distributed to workshop attendees.
Authors should submit their extended abstracts on, or before, 11:59PM EDT,
July 20th, 2007 (extended since initial CFP). Authors will be notified of
acceptance by August 15th, 2007. A final PDF file of the extended abstract
to be distributed to attendees must be submitted by September 1st, 2007.
Submissions will be evaluated based on their novelty, fundamental insights,
and their potential for long-term contribution. New-idea papers and papers
describing work-in-progress and preliminary results are encouraged.
Submission questions should be directed to Vijay S. Pai.
Important dates
Extended abstract submission: July 20th, 2007, 11:59pm EDT
Author notification: August 15th, 2007
Final copy due to the conference: September 1st, 2007
Submissions are accepted through the workshop web site (
http://www.ece.purdue.edu/~pmup2007/ ) or directly at
http://www.edas.info/newPaper.php?c=5560&;
Organizers:
Vijay S. Pai, Purdue Univ.
Kath Knobe, Intel
Program Committee:
Angelos Bilas, FORTH/Univ. of Crete
Michael Champigny, Intel
Bronis de Supinski, LLNL
Ian Foster, Argonne Natl. Lab
Diana Franklin, Cal Poly
Neal Glew, Intel
María Jesús Garzarán, UIUC
Costin Iancu, LBNL
Daan Leijen, Microsoft Research
Bill Mark, Univ. of Texas
Samuel P. Midkiff, Purdue Univ.
John Owens, UC Davis
Fabrizio Petrini
Rodric Rabbah, MIT
Vijay Saraswat, IBM Research
Hans Zima, JPL/Univ. of Vienna
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