Re: [Gems-users] MOESI_SMP_hammer question

["Perry Wang" <peilien@xxxxxxxxx>]

Hi Mike,

I tried to modify MOESI_SMP_hammer-dir to always stay in Exclusive state and
respond to read/write request but the L1Cache_Controller is giving me
transition error.  

I'm assuming that L1 and L2 cache keep local states and should be
independent of what the "directory" is doing?   

Thanks again,
Perry

> -----Original Message-----
> From: gems-users-bounces@xxxxxxxxxxx [mailto:gems-users-
> bounces@xxxxxxxxxxx] On Behalf Of Mike Marty
> Sent: Tuesday, July 18, 2006 2:27 PM
> To: Gems Users
> Subject: Re: [Gems-users] MOESI_SMP_hammer question
> 
> Mike Marty wrote:
> 
> >We added an optimization to the AMD Hammer protocol so that data is not
> >returned twice on any sharing miss. This requires meta-state to the
> >memory controller. It isn't really a directory.
> >
> >
> >
> 
> If I wasn't clear, the memory controller in the AMD Hammer protocol
> _always_ responds with Data even if the data is stale.  If the data is
> dirty in a cache, then the requestor will eventually get the dirty data
> and throw away the stale data.  Thus a 2nd data response only happens
> for dirty sharing misses.
> 
> You should be able to easily modify the protocol to match what is
> actually done.
> 
> 
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