Date: | Mon, 13 Jun 2011 17:27:48 -0400 |
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From: | Hui Zhao <hzhao5@xxxxxxxxx> |
Subject: | [Gems-users] How to create a new Cache configuration with L3 Cache |
Hello
I want to create a cache configuration with private L1 caches, shared L2 cache by every 2 cores, and a shared L3 cache by all cores, and this is a single chip. Can anyone shed some light? I have seen former questions similar to this one, but nobody seems to know how.
It seems to me to make cache configuration changes in GEMS is more complicated compared with in Simics, which is quite straight forward.
Thanks
H.Z.
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