I figured out what I was doing wrong, so you can disregard this question...Thanks!
Quoting hb166307@xxxxxxxx:
> Hello GEMS users,
>
> I have been trying to use the FILE_SPECIFIED topology and I can not
> seem to get
> a system created. I am using the files with the prefix NUCA that came
> in the
> ruby/network/simple/Network_Files directory. I set the appropriate
> ruby
> parameters to use a use one of the unmodified network description.
> The only ones
> that seem to work are:
>
> NUCA_Procs-1_ProcsPerChip-1_L2Banks-1_Memories-1.txt
> NUCA_Procs-1_ProcsPerChip-1_L2Banks-32_Memories-1.txt
>
> Every other one give either hangs while creating the system of gives
> the
> following error.
>
> Segmentation fault (SIGSEGV) in main thread
> The simulation state has been corrupted. Simulation cannot continue.
> Please restart Simics.
>
> I really hope that it is something that I am missing. Any ideas?
> Thank you in
> advance. Would really appreciate any help!
>
> ---------------------------------------------------------------------------
>
> Quoting Mike Marty <mike.marty@xxxxxxxxx>:
>
> > ------=_Part_35741_18221839.1223215779174
> > Content-Type: text/plain; charset=ISO-8859-1
> > Content-Transfer-Encoding: 7bit
> > Content-Disposition: inline
> >
> > On Fri, Oct 3, 2008 at 11:38 PM, Niket <niketa@xxxxxxxxxxxxx>
> wrote:
> >
> > > The configuration you have created is a 8 processor system with
> 2
> > L2
> > > banks and 2 Routers connecting various components. It does not
> > > necessarily imply a 2-chip configuration. For instance, all
> these
> > > connections are also valid for a single chip system. The
> > > NUM_PROCS_PER_CHIP controls that. You might also want to use the
> > > appropriate protocol for that.
> > >
> > > If you want to use a 2-chip configuration with 4 procs/chip, I
> > believe
> > > you can use the MSI_MOSI_CMP_directory protocol. However, the
> L2's
> > would
> > > not be unified between the 2-chips. The 2-chips in that case
> would
> > be
> > > connected by the link between Routers 0 and 1.
> > >
> > > I am not sure whether there is a protocol with the GEMS
> > distribution
> > > that lets you use a unified L2 across 2 chips. The GEMS team
> might
> > > clarify that.
> > >
> >
> > Unless things have changed, the PROCS_PER_CHIP parameter
> essentially
> > determines how the L2 is split across "chips". You could set
> > PROCS_PER_CHIP
> > to 8, but then configure your interconnect into two separate
> regions
> > of
> > higher-bandwidth, lower-latency links.
> >
> > ------=_Part_35741_18221839.1223215779174
> > Content-Type: text/html; charset=ISO-8859-1
> > Content-Transfer-Encoding: 7bit
> > Content-Disposition: inline
> >
> > <div dir="ltr"><br><br><div class="gmail_quote">On Fri, Oct 3,
> 2008
> > at 11:38 PM, Niket <span dir="ltr"><<a
> >
> href="mailto:niketa@xxxxxxxxxxxxx">niketa@xxxxxxxxxxxxx</a>></span>
> > wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0
> > .8ex;border-left:1px #ccc solid;padding-left:1ex;">
> > The configuration you have created is a 8 processor system with 2
> > L2<br>
> > banks and 2 Routers connecting various components. It does not<br>
> > necessarily imply a 2-chip configuration. For instance, all
> > these<br>
> > connections are also valid for a single chip system. The<br>
> > NUM_PROCS_PER_CHIP controls that. You might also want to use
> the<br>
> > appropriate protocol for that.<br>
> > <br>
> > If you want to use a 2-chip configuration with 4 procs/chip, I
> > believe<br>
> > you can use the MSI_MOSI_CMP_directory protocol. However, the
> > L2's would<br>
> > not be unified between the 2-chips. The 2-chips in that case would
> > be<br>
> > connected by the link between Routers 0 and 1.<br>
> > <br>
> > I am not sure whether there is a protocol with the GEMS
> > distribution<br>
> > that lets you use a unified L2 across 2 chips. The GEMS team
> > might<br>
> > clarify that.<br></blockquote><div><br></div><div>Unless things
> have
> > changed, the PROCS_PER_CHIP parameter essentially determines how
> the
> > L2 is split across "chips". You could set
> > PROCS_PER_CHIP to 8, but then configure your interconnect into two
> > separate regions of higher-bandwidth, lower-latency links.</div>
> > <div><br></div><div><br></div></div></div>
> >
> > ------=_Part_35741_18221839.1223215779174--
> >
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