Re: [Gems-users] Change in cpu frequency - question

[Pradeep Ramachandran <pramach2@xxxxxxxx>]

Thanks. I will look into the tick and tick compare registers to post interrupts later.

However, I am trying to understand why this is happening, and it seems strange that increasing the clock frequency to even 80MHz (from the default 75MHz) makes the simulation time exponentially shoot up to days of simulation for what used to take a few minutes. It looks like there are some optimizations that simics is doing at 75MHz. Any ideas why this may be happening?

Pradeep.

On Feb 6, 2010, at 7:00 PM, Philip Garcia wrote:

You can get around the 75MHz clock issue by stalling the timer interrupts  until you want them.  This can be done by manipulating the tick and tick compare register so that it goes off at specified times.

Phil

On Feb 6, 2010, at 5:14 PM, Pradeep Ramachandran wrote:

Hi,
I noticed from an old thread <https://lists.cs.wisc.edu/archive/gems-users/2007-August/msg00027.shtml> that users have experienced the problem of elevated simulation times when changing the default clock in the simics system from 75MHz to (more realistic) 2GHz. I am seeing a similar problem when I am trying to simulate a multithreaded server workload.

The message pointed to above says that it is probably ok to evaluate things with the 75MHz clock as the I/O simulation becomes a bottle-neck. However, at 75MHz, the timer interrupts forces a thread switch every 1m instructions or less. Won't that mess with the measurements (of performance and throughput)? Is there any simple method that people use to eliminate errors that may arise because of this?

Thanks in advance for the help,
Pradeep.

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