On Feb 6, 2010, at 7:00 PM, Philip Garcia wrote:
You can get around the 75MHz clock issue by stalling the timer
interrupts until you want them. This can be done by manipulating
the tick and tick compare register so that it goes off at specified
times.
I have been digging around to find information on the tick and tick
compare registers (%stick and %stick_cmpr), but I have found hardly
any info (even the SPARCV9 manual doesn't list them!). Do you have any
pointers on how the registers are used? As I'd mentioned before, I
would like to make the timer interrupts less frequent so that I
simulate a 2GHz-like balanced machine with the 75MHz simics system,
for which I need to make timer interrupts far less frequent.
Thanks,
Pradeep.
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